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MK74CB115 Datasheet(PDF) 2 Page - Integrated Circuit Systems

Part No. MK74CB115
Description  1 to 16 Buffalo™ Clock Driver
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Maker  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
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MK74CB115 Datasheet(HTML) 2 Page - Integrated Circuit Systems

   
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MK74CB115
1 to 16 Buffalo™ Clock Driver
MDS 74CB115 D
2
Revision 020800
Printed 11/16/00
Integrated Circuit Systems, Inc. • 525 Race St. • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com
Number
Name
Type
Description
1
OE1
I
Output Enable. Tri-states Q2 to Q7 clock outputs when this input is low. Internal pull-up.
2, 3
Q0, Q1
O
Clock outputs.
4, 7, 8
Q2, Q3, Q4
O
Clock outputs.
5, 6
VDD
P
Power supply. Connect to +3.3 V or 5 V.
9, 10
GND
P
Connect to ground.
11, 12, 13
Q5, Q6, Q7
O
Clock outputs.
14
IN
I
Clock input for 16 buffers.
15
OE0
I
Output Enable. Tri-states Q8 to Q13 clock outputs when this input is low. Internal pull-up.
16, 17, 18
Q8, Q9, Q10
O
Clock outputs.
19, 20
GND
P
Connect to ground.
21, 22, 25 Q11, Q12, Q13
O
Clock outputs.
23, 24
VDD
P
Power supply. Connect to +3.3 V or 5 V.
26, 27
Q14, Q15
O
Clock outputs.
OE2
I
Output Enable. Tri-states Q0, Q1, Q15 and Q14 clock outputs when this input is low.
Internal pull-up.
Pin Descriptions
Type: I = Input, O = output, P = power supply connection
Pin Assignment
1
8
9
2
3
4
5
6
7
10
11
12
13
14
Q0
Q1
Q2
Q3
Q4
Q5
Q7
Q6
OE1
GND
GND
IN
VDD
VDD
Q15
Q14
Q13
Q12
Q11
Q10
Q8
Q9
OE2
GND
GND
OE0
VDD
VDD
16
15
17
18
19
20
21
22
23
24
25
28
27
26
Suggested Layout
V
G
G
V
For simplicity, series terminating resistors (required) are
not shown for the outputs, but should be placed as close to
the device as possible. It is most critical to have the 0.1µF
decoupling capacitors closest.
V = connect to VDD
= connect to GND
G
0.1µF
0.1µF
28


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