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MK2716S Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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MK2716S Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 4 page MK2716 HDTV Clock Synthesizer MDS 2716 B 2 Revision 062599 Printed 11/16/00 MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax I C R O C LOC K Pin Assignment Number Name Type Description 1 ICLK/X1 XI Input clock connection. Connect to a 27 MHz clock input or 27 MHz fundamental crystal. 2 VDD P Connect to +3.3V or +5V. 3 GND P Connect to ground. 4 CLK O 74.17582418 MHz or 74.25 MHz clock output (see table above). 5 GND P Connect to ground. 6 SEL I Select pin determines value of CLK per table above. 7 27M O 27 MHz buffered clock or crystal oscillator output. 8 X2 XO Connect to 27 MHz crystal, or leave unconnected for clock input. Pin Descriptions Type: I = Input; O = output; P = power supply connection; XI, XO = crystal connections 8 pin SOIC Decoupling and External Components The MK2716 requires a 0.1µF decoupling capacitor to be connected between VDD and GND on pins 2 and 3. It must be connected close to the MK2716. Pin 5 can be connected to pin 3. A 33 Ω terminating resistor should be placed close to pin 4, and pin 7. If using a crystal input, it should be a 27.00 MHz, parallel resonant, fundamental mode, with load (correlation) capacitance of 18 pF. If the crystal has a load capacitance of 20 pF, connect 4 pF capacitors from X1 and X2 to ground. 1 8 2 3 4 7 6 5 ICLK/X1 GND X2 VDD GND SEL CLK 27M SEL CLK 0 74.17582418 1 74.25 Frequency Select Table (MHz) |
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