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ICS9248-168 Datasheet(PDF) 5 Page - Integrated Circuit Systems

Part No. ICS9248-168
Description  AMD - K7™ Clock Generator for Mobile System
Download  14 Pages
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Maker  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
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ICS9248-168 Datasheet(HTML) 5 Page - Integrated Circuit Systems

 
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5
ICS9248-168
Third party brands and names are the property of their respective owners.
Byte 1: CPU, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B2
21
0
S
F
6
t
i
B5
1
1
S
F
5
t
i
B4
1
2
S
F
4
t
i
B2
41
X
1
=
1
X
5
.
1
=
0
K
L
C
U
P
C
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B0
4
,
1
41
X
1
=
1
X
5
.
1
=
0
C
/
T
K
L
C
U
P
C
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B2
41
K
L
C
U
P
C
Byte 2: PCI, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B4
1
F
_
K
L
C
I
C
P
6
t
i
B5
11
6
K
L
C
I
C
P
5
t
i
B2
11
5
K
L
C
I
C
P
4
t
i
B1
11
4
K
L
C
I
C
P
3
t
i
B0
11
3
K
L
C
I
C
P
2
t
i
B9
1
2
K
L
C
I
C
P
1
t
i
B8
1
1
K
L
C
I
C
P
0
t
i
B5
1
0
K
L
C
I
C
P
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
2. Latched Frequency Selects (FS#) will be inverted logic
load of the input frequency select pin conditions.
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B7
21
F
_
M
A
R
D
S
5
t
i
B8
21
5
M
A
R
D
S
4
t
i
B9
21
4
M
A
R
D
S
3
t
i
B2
31
3
M
A
R
D
S
2
t
i
B3
31
2
M
A
R
D
S
1
t
i
B6
31
1
M
A
R
D
S
0
t
i
B7
31
0
M
A
R
D
S
Byte 4: SDRAM , Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B-
1
d
e
v
r
e
s
e
R
5
t
i
B-
1
d
e
v
r
e
s
e
R
4
t
i
B-
1
d
e
v
r
e
s
e
R
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
Byte 5: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Byte 3: Active/Inactive Register
(1= enable, 0 = disable)
Byte 6: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B3
21
#
8
4
_
4
2
L
E
S
5
t
i
B2
21
z
H
M
8
4
4
t
i
B3
21
z
H
M
8
4
_
4
2
3
t
i
B8
41
0
F
E
R
2
t
i
B7
41
1
F
E
R
1
t
i
B6
41
2
F
E
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
0
d
e
v
r
e
s
e
R
6
t
i
B-
0
d
e
v
r
e
s
e
R
5
t
i
B-
0
d
e
v
r
e
s
e
R
4
t
i
B-
0
d
e
v
r
e
s
e
R
3
t
i
B-
0
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
0
d
e
v
r
e
s
e
R


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