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ICS9248-126 Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS9248-126 Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 12 page 2 ICS9248-126 Third party brands and names are the property of their respective owners. The ICS9248-126 is the single chip clock solution for Desktop/Notebook designs using the SIS 540/630 style chipset. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-126 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. General Description Power Groups VDDREF = REF, X1, X2 VDDPCI = PCICLK_F, PCICLK VDDSDR = SDRAM, supply for PLL core, VDD48 = 48MHz, 24MHz VDDLCPU = CPUCLKs Pin Configuration PIN NUMBER PIN NAME TYPE DESCRIPTION 1, 6, 15, 19, 27, 30, 36, 42 VDD PWR 3.3V Power supply for SDRAM output buffers, PCI output buffers, reference output buffers and 48M Hz output REF0 OUT 14.318 M Hz reference clock. FS3 IN Frequency select pin. 3, 10, 16, 22, 33, 39, 44 GND PWR Ground pin for 3V outputs. 4 X1 IN Crystal input,nominally 14.318M Hz. 5 X2 OUT Crystal output, nominally 14.318M Hz. FS1 IN Frequency select pin. PCICLK0 OUT PCI clock outputs. FS2 IN Frequency select pin. PCICLK1 OUT PCI clock outputs. 14, 13, 12, 11, 9 PCICLK (6:2) OUT PCI clock outputs. 41, 40, 38, 37, 35, 34, 32, 31, 29, 28, 21, 20, 18, 17 SDRAM (13:0) OUT SDRAM clock outputs 23 SDATA I/O Data pin for I 2 C circuitry 5V tolerant 24 SCLK IN Clock input of I2C input, 5V tolerant input CPU2.5_3.3# IN Voltage select 2.5V when high - 3.3V when low 24_48M Hz OUT Clock output for super I/O/USB default is 24M Hz FS0 IN Frequency select pin. 48M Hz OUT 48MHz output clock 43, 45, 46 CPUCLK (2:0) OUT CPU clock outputs. 47 VDDLCPU PWR Power pin for the CPUCLKs. 2.5V 48 REF1 OUT 14.318 M Hz reference clock. 26 2 7 8 25 |
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