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ICS9248-114 Datasheet(PDF) 5 Page - Integrated Circuit Systems

Part No. ICS9248-114
Description  AMD - K7™ System Clock Chip
Download  14 Pages
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Maker  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
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ICS9248-114 Datasheet(HTML) 5 Page - Integrated Circuit Systems

 
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5
ICS9248-114
Third party brands and names are the property of their respective owners.
Byte 1: CPU, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
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C
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7
t
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#
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1
)
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(
5
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1
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(
4
t
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B-
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#
3
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3
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B0
41
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2
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#
)
#
8
4
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4
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(
1
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B4
4
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Byte 2: PCI, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
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R
C
S
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7
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B-
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#
0
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1
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4
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B3
11
4
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3
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B2
11
3
K
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C
P
2
t
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B1
11
2
K
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1
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B0
11
1
K
L
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0
t
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B8
1
0
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L
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C
P
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
2. Latched Frequency Selects (FS#) will be inverted logic
load of the input frequency select pin conditions.
T
I
B#
N
I
PD
W
PN
O
I
T
P
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C
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D
7
t
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B8
21
7
M
A
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D
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6
t
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B9
21
6
M
A
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D
S
5
t
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B1
31
5
M
A
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D
S
4
t
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B2
31
4
M
A
R
D
S
3
t
i
B4
31
3
M
A
R
D
S
2
t
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B5
31
2
M
A
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D
S
1
t
i
B7
31
1
M
A
R
D
S
0
t
i
B8
31
0
M
A
R
D
S
Byte 4: SDRAM , Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
6
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
5
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
4
t
i
B-
X
#
E
D
O
M
3
t
i
B-
X
#
1
S
F
2
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
1
t
i
B8
41
1
F
E
R
0
t
i
B2
1
0
F
E
R
Byte 5: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Byte 3: SDRAM, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
6
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
5
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
4
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
3
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
2
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
1
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
0
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
Byte 6: Peripheral , Active/Inactive Register
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
6
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
5
t
i
B6
21
z
H
M
8
4
4
t
i
B5
21
z
H
M
8
4
_
4
2
3
t
i
B7
11
1
1
M
A
R
D
S
2
t
i
B8
11
0
1
M
A
R
D
S
1
t
i
B0
21
9
M
A
R
D
S
0
t
i
B1
21
8
M
A
R
D
S


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