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AD102 Datasheet(PDF) 4 Page - Analog Devices |
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AD102 Datasheet(HTML) 4 Page - Analog Devices |
4 / 6 page REV. A –4– AD102/AD104 INSIDE THE AD102 AND AD104 The AD102 and AD104 use an amplitude modulation tech- nique to exploit transmission of low frequency signal levels through an isolation barrier produced by a signal transformer including signals at a dc level (Figures 1 and 2). Additionally a separate transformer is incorporated to provide power to the isolated input port of the device. It is driven by a 25 kHz, 15 V amplitude square wave generated internally by the AD102, sup- plied externally for the AD104. The device outputs are not buffered so the user may inter- change output leads for signal inversion. In multichannel appli- cations the outputs can be multiplexed with a single buffer following the multiplexer to minimize offset errors while reduc- ing power consumption and cost. ±5V FS SIGNAL ICOM PWR/CLK COM 25kHz POWER DEMOD AMPLIFIER AND MODULATOR POWER RECTIFIER OSCILLATOR FILTER AD102 OUT H I OUT LO +15V DC IN+ IN– FB 3 6 5 4 9 1 7 2 Figure 1. AD102 Functional Block Diagram ±5V FS SIGNAL ICOM PWR/CLK COM 25kHz POWER DEMOD AMPLIFIER AND MODULATOR POWER RECTIFIER FILTER AD104 OUT H I OUT LO CLK IN IN+ IN– FB 3 6 5 4 9 1 8 2 Figure 2. AD104 Functional Block Diagram USING THE AD102 AND AD104 Powering the AD102 The AD102 requires only a single +15 V DC power supply con- nected as shown in Figure 3 to operate. A series 1.3 k Ω resistor and 1.0 µF capacitor are connected across the +15 V DC and COMMON pins to aid in filtering power line variations. 1.0µF AD102 1.3k PWR/CLK COM +15VDC 7 2 Figure 3. AD102 Power Input Powering the AD104 The AD104 requires its power in the form of a 15 V p-p, 25 kHz square wave from an external source as shown in Fig- ure 4 (NOTE: pinout for AD246 clock driver shown). 2 8 AD104 AD104 2 8 2 8 AD104 15V p-p @ 25kHz 2 13 12 +15VDC PWR/CLK COM AD246 CLOCK DRIVER 1 Figure 4. Typical Multiple AD104 Connection AD104 Clock Source The AD246 clock driver designed to power the AD204 is a clock driver that can be used to supply the required clock for the AD104 from a +15 V DC supply (refer to the AD202/AD204 data sheet for AD246 specifications). For designs where the lowest cost per channel approach is de- sired, it is usually more cost efficient for designers to consider a discrete onboard clock source such as the circuit shown in Figure 5 (essentially an AD246). 180pF 12 9 8 7 4 1 3 2 10 2 4 7 5 6 3 TELEDYNE TSC426 1N914 1N914 1µF 35V +15V CLK OUT CLK/PWR COM 14 6 5 49.9k C RC Q R CD4047B Figure 5. Typical Clock Driver Circuit OBSOLETE |
Similar Part No. - AD102_15 |
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Similar Description - AD102_15 |
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