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ICS601G-01T Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS601G-01T Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 5 page ICS601-01 Low Phase Noise Clock Multiplier MDS 601-01 G 2 Revision 090800 Printed 11/14/00 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com Pin Descriptions Key: I = Input with internal pull-up resistor; O = output; P = power supply connection; XI, XO = crystal connections. Pin Assignment Number Name Type Description 1 CLK O Clock output from VCO. Output frequency equals the input frequency times multiplier. 2 REFEN I Reference clock enable. Turns off the buffered crystal oscillator clock (stops low) when low. 3 VDD P Connect to +3.3V or +5V. Must match other VDDs. 4 VDD P Connect to +3.3V or +5V. Must match other VDDs. 5 VDD P Connect to +3.3V or +5V. Must match other VDDs. 6 X2 XO Crystal connection. Connect to a 10 - 27 MHz fundamental parallel mode crystal. 7 S1 I Multiplier select pin 1. Determines CLK output per table above. Internal pull-up. 8 X1/ICLK XI Crystal connection. Connect to a 10-27 MHz fundamental parallel mode crystal, or clock 9 S2 I Multiplier select pin 2. Determines CLK output per table above. Internal pull-up. 10 S3 I Multiplier select pin 3. Determines CLK output per table above. Internal pull-up. 11 S0 I Multiplier select pin 0. Determines CLK output per table above. Internal pull-up. 12 OE I Output Enable. Tri-states both output clocks when low. Internal pull-up. 13 REFOUT O Buffered crystal oscillator clock output. Controlled by REFEN. 14 GND P Connect to ground. 15 GND P Connect to ground. 16 GND P Connect to ground. ICS601-01 0=connect directly to ground 1=connect directly to VDD 1 8 9 16 2 3 4 5 6 7 10 11 12 13 14 15 S0 GND GND REFOUT OE CLK REFEN S1 X2 VDD VDD VDD X1/ICLK S3 GND S2 S3 S2 S1 S0 CLK (see note 2 on following page) 0 0 0 0 TEST 0 0 0 1 TEST 0 0 1 0 Input x1 0 0 1 1 Input x3 0 1 0 0 Input x4 0 1 0 1 Input x5 0 1 1 0 Input x6 0 1 1 1 Input x8 1 0 0 0 TEST 1 0 0 1 Crystal osc. pass through (no PLL) 1 0 1 0 Input x2 1 0 1 1 TEST 1 1 0 0 Input x8 1 1 0 1 Input x10 1 1 1 0 Input x12 1 1 1 1 Input x16 Multiplier Select Table |
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