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STAC9711T Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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5 / 56 page SigmaTel, Inc Preliminary STAC9708/11 5 10/02/98 Table of Contents – Tables Table 1 – Package Dimensions 6 Table 2 – Pin Designation 6 Table 3 – Digital Signal List 9 Table 4 – Analog Signal List 10 Table 5 – Filtering and Voltage References 11 Table 6 – 9708/11 Power Signal List 11 Table 7 –Mixer Functional Connections 24 Table 8 – Programming Registers 25 Table 9 – Play Master Volume Register 26 Table 10 – PC Beep Register 27 Table 11 – Analog Mixer Input Gain Register 27 Table 12, 13 – Record Select Control Registers 28 Table 14 – Record Gain Registers 29 Table 15 – General Purpose Registers 29 Table 16, 17 – 3D Control Registers 30 Table 18– Multi-Channel Programming Register 31 Table 19 – Powerdown Status Registers 31 Table 20 – Low Power Modes 32 Table 21 - Codec ID Selection 36 Table 22 - Secondary Codec Register Access Slot 0 Bit Definitions 37 Table 23 – Cold Reset 36 Table 24 – Warm Reset 36 Table 25 – Clocks 37 Table 26 – Data Setup and Hold 38 Table 27 – Signal Rise and Fall Times 39 Table 28 – AC-Link Low Power Mode Timing 40 Table 29 – ATE Test Mode 40 Table 30 – Operating Conditions 44 Table 28 – Power Consumption 45 Table 29 – AC-Link Static Specifications 45 Table 30 – 9708 Analog Performance Characteristics 46 Table 31 – 9711 Analog Performance Characteristics 48 Table of Contents – Figures Figure 1 – Package Outline 6 Figure 2 – STAC9708 Block Diagram 7 Figure 3 – Connection Diagram 8 Figure 4 – STAC9708 AC-Link 12 Figure 5 – AC'97 Standard Bi-directional 15 Figure 6 – AC-Link Audio Output Frame 15 Figure 7 – Start of an Audio Output Frame 16 Figure 8 – STAC9708 Audio Input Frame 19 Figure 9 – Start of an Audio Input Frame 20 Figure 10 – STAC9708 Powerdown Timing 22 Figure 11 – STAC9708 Mixer Functional Diagram 23 Figure 12 – Example of STAC9708 Powerdown/ Powerup flow 35 Figure 13 – STAC9708 Powerdown/Powerup with analog still alive 35 Figure 14 – Cold Reset 38 Figure 15 – Warm Reset 39 Figure 16 – Clocks 39 Figure 17 – Data Setup and Hold 40 Figure 18 – Signal Rise and Fall Times 41 Figure 19 – AC-Link Low Power Mode Timing 42 Figure 20 – ATE Test Mode 42 |
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