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GM16C550 Datasheet(PDF) 3 Page - Hynix Semiconductor |
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GM16C550 Datasheet(HTML) 3 Page - Hynix Semiconductor |
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3 / 22 page  GM16C550 3 AC Characteristics C 0 T A ° = to V 5 V , C 70 CC = ° + ± 5% Symbol Parameter Min Max Units Conditions ADS t Address Srobe Width 60 ns AH t Address Hold Time 0 ns AR t RD , RD Delay from Address 30 ns Note 1 AS t Address Setup Time 60 ns AW t WR , WR Delay from Select 30 ns Note 1 CH t Chip Select Hold Time 0 ns CS t Chip Select Setup time 60 ns CSR t RD , RD Delay from Chip Select 30 ns Note 1 CSW t WR , WR Delay from Select 30 ns Note 1 DH t Data Hold Time 30 ns DS t Date Setup Time 30 ns HZ t RD , RD to Floating Data Delay 0 100 ns 100 pF loading, Note 3 MR t Master Reset Pulse Width 5 ns RA r Address Hold Time from RD , RD 20 ns Note 1 RC t Read Cycle Delay 125 ns RCS t Chip Select Hold Time from RD , RD 20 ns Note 1 RD t RD , RD Strobe Width 125 ns RDD t RD , RD to Driver Enable/Disable 60 ns 100 pF loading, Note 3 RVD t Delay from - RD , RD to Data 125 ns 100 pF loading, WA t Address Hold Time from WR , WR 20 ns Note 1 WC t Write Cycle Delay 150 ns WCA t Chip Select Hold Time from WR , WR 20 ns Note 1 WR t WR , WR Strobe Width 100 ns XH t Duration of clock High Pulse 55 ns External Clock (8.0 MHz Max.) XL t Duration of clock Low Pulse 55 ns Exrternal Clock (8.9 MHz Max.) RC Read Cycle= RC RD AR t t t + + 280 ns Note 4 WC Write Cycle= WC WR AW t t t + + 280 ns Baud Generator N Baud Divisor 1 16 2 -1 BHD t Baud Output Positive Edge Delay 175 ns 100 pF load BLD t Baud Output Negative Edge Delay 175 ns 100 pF load HW t Baud Output Up Time 75 ns MHz 0 . 8 f X = , +2, 100 pF load LW t Baud Output Down Time 100 ns MHz 0 . 8 f X = , +2, 100 pF load |
Similar Part No. - GM16C550 |
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Similar Description - GM16C550 |
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