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ATAR092-C Datasheet(PDF) 36 Page - ATMEL Corporation |
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ATAR092-C Datasheet(HTML) 36 Page - ATMEL Corporation |
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36 / 108 page  36 4593D–4BMCU–05/06 ATAR092-C/ATAR892-C If the serial interface is used to modulate a bit-stream, the 4-bit stage of Timer 2 has a special task. The shift register can only handle bit-stream lengths divisible by 8. For other lengths, the 4-bit counter stage can be used to stop the modulator after the right bit-count is shifted out. If the timer is used for carrier frequency modulation, the 4-bit stage works together with an addi- tional 2-bit duty cycle generator like a 6-bit prescaler to a generate carrier frequency and duty cycle. The 8-bit counter is used to enable and disable the modulator output for a programmable count of pulses. For programming the time interval, the timer has a 4-bit and an 8-bit compare register. For pro- gramming the timer function, it has four modes and control registers. The comparator output of stage 2 is controlled by a special compare mode register (T2CM). This register contains mask bits for the actions (counter reset, output toggle, timer interrupt) which can be triggered by a compare match event or the counter overflow. This architecture enables the timer to function in various modes. Timer 2 has a 4-bit compare register (T2CO1) and an 8-bit compare register (T2CO2). Both these compare registers are cascadable as a 12-bit compare register, or 8-bit compare register and 4-bit compare register. Figure 5-10. Timer 2 For 12-bit compare data value: m = x + 1 0 ≤x ≤4095 For 8-bit compare data value: n = y + 1 0 ≤y ≤255 For 4-bit compare data value: l = z + 1 0 ≤z ≤15 4-bit Counter 2/1 RES OVF1 Compare 2/1 T2CO1 CM1 POUT SSI POUT CL2/2 DCG T2M1 P4CR 8-bit Counter 2/2 RES OVF2 Compare 2/2 T2CO2 T2CM Control TOG2 INT4 Bi-phase Manchester modulator OUTPUT MOUT M2 to Modulator 3 T2O Timer 2 modulator output-stage T2M2 SO Control SSI SSI I/O-bus T2C CL2/1 T2I SYSCL T1OUT TOG3 SCL I/O-bus DCGO |
Similar Part No. - ATAR092-C_14 |
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Similar Description - ATAR092-C_14 |
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