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ATAR092-C Datasheet(PDF) 66 Page - ATMEL Corporation |
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ATAR092-C Datasheet(HTML) 66 Page - ATMEL Corporation |
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66 / 108 page  66 4593D–4BMCU–05/06 ATAR092-C/ATAR892-C 5.3.4.5 9-bit Shift Mode In the 9-bit shift mode, the SSI is able to handle the MCL protocol (described below). It always operates as an MCL master device, i.e., SC is always generated and output by the SSI. Both the MCL start and stop conditions are automatically generated whenever the SSI is activated or deactivated by the SIR-bit. In accordance with the MCL protocol, the output data is always changed in the clock low phase and shifted in on the high phase. Before activating the SSI (SIR = 0) and commencing an MCL dialog, the appropriate data direc- tion for the first word must be set using the SDD control bit. The state of this bit controls the direction of the data port (BP43 or MCL_SD). Once started, the 8 data bits are, depending on the selected direction, either clocked into or out of the shift register. During the 9th clock period, the port direction is automatically switched over so that the corresponding acknowledge bit can be shifted out or read in. In transmit mode, the acknowledge bit received from the device is cap- tured in the SSI Status Register (TACK) where it can be read by the controller. In receive mode, the state of the acknowledge bit to be returned to the device is predetermined by the SSI Status Register (RACK). Changing the direction mode (TX/RX) should not be performed during the transfer of an MCL telegram. One should wait until the end of the telegram which can be detected using the SSI interrupt (IFN = 1) or by interrogating the ACT status. Once started, a 9-bit telegram will always run to completion and will not be prematurely termi- nated by the SIR bit. So, if the SIR-bit is set to 1 within the telegram, the SSI will complete the current transfer and terminate the dialog with an MCL stop condition. Figure 5-42. Example of MCL Transmit Dialog 7 6 54 32 1 7 65 4 3 2 1 0 A msb lsb tx data 1 tx data 2 msb lsb Write STB (tx data 1) SC SD SRDY ACT Interrupt (IFN = 0) Interrupt (IFN = 1) 0A Write STB (tx data 2) SIR SDD Start Stop |
Similar Part No. - ATAR092-C_14 |
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Similar Description - ATAR092-C_14 |
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