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ATXMEGA384C3 Datasheet(PDF) 11 Page - ATMEL Corporation |
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ATXMEGA384C3 Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 125 page  11 XMEGA C3 [DATASHEET] Atmel-8361F-AVR-ATxmega384C3-Datasheet–11/2014 7. Memories 7.1 Features • Flash program memory – One linear address space – In-system programmable – Self-programming and boot loader support – Application section for application code – Application table section for application code or data storage – Boot section for application code or boot loader code – Separate read/write protection lock bits for all sections – Built in fast CRC check of a selectable flash program memory section • Data memory – One linear address space – Single-cycle access from CPU – SRAM – EEPROM Byte and page accessible Optional memory mapping for direct load and store – I/O memory Configuration and status registers for all peripherals and modules Four bit-accessible general purpose registers for global variables or flags – Bus arbitration Deterministic priority handling between CPU, DMA controller, and other bus masters – Separate buses for SRAM, EEPROM and I/O memory Simultaneous bus access for CPU and DMA controller • Production signature row memory for factory programmed data – ID for each microcontroller device type – Serial number for each device – Calibration bytes for factory calibrated peripherals • User signature row – One flash page in size – Can be read and written from software – Content is kept after chip erase 7.2 Overview The Atmel AVR architecture has two main memory spaces, the program memory and the data memory. Executable code can reside only in the program memory, while data can be stored in the program memory and the data memory. The data memory includes the internal SRAM, and EEPROM for nonvolatile data storage. All memory spaces are linear and require no memory bank switching. Nonvolatile memory (NVM) spaces can be locked for further write and read/write operations. This prevents unrestricted access to the application software. A separate memory section contains the fuse bytes. These are used for configuring important system functions, and can only be written by an external programmer. The available memory size configurations are shown in “Ordering Information” on page 2. In addition, each device has a Flash memory signature row for calibration data, device identification, serial number, etc. 7.3 Flash Program Memory The Atmel AVR XMEGA devices contain on-chip, in-system reprogrammable flash memory for program storage. The flash memory can be accessed for read and write from an external programmer through the PDI or from application software running in the device. All AVR CPU instructions are 16 or 32 bits wide, and each flash location is 16 bits wide. The flash memory is organized in two main sections, the application section and the boot loader section. The sizes of the different sections are fixed, but |
Similar Part No. - ATXMEGA384C3_14 |
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