Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

ATTINY261 Datasheet(PDF) 13 Page - ATMEL Corporation

Part No. ATTINY261
Description  High Performance, Low Power AVR
Download  16 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  ATMEL [ATMEL Corporation]
Homepage  http://www.atmel.com
Logo 

ATTINY261 Datasheet(HTML) 13 Page - ATMEL Corporation

 
Zoom Inzoom in Zoom Outzoom out
 13 / 16 page
background image
13
ATtiny261/ATtiny461/ATtiny861/ATtiny461 [DATASHEET]
7753G–AVR–06/14
5.5.1
SPH and SPL – Stack Pointer Register
5.6
Instruction Execution Timing
This section describes the general access timing concepts for instruction execution. The AVR® CPU is driven by the CPU
clock clkCPU, directly generated from the selected clock source for the chip. No internal clock division is used.
Figure 5-4 shows the parallel instruction fetches and instruction executions enabled by the Harvard architecture and the fast
access register file concept. This is the basic pipelining concept to obtain up to 1MIPS per MHz with the corresponding
unique results for functions per cost, functions per clocks, and functions per power-unit.
Figure 5-4. The Parallel Instruction Fetches and Instruction Executions
Figure 5-5 shows the internal timing concept for the register file. In a single clock cycle an ALU operation using two register
operands is executed, and the result is stored back to the destination register.
Figure 5-5. Single Cycle ALU Operation
Bit
15141312
11
10
9
8
0x3E (0x5E)
SP15
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SPH
0x3D (0x5D)
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
SPL
76543210
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND
RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND RAMEND
clk
CPU
1st Instruction Fetch
1st Instruction Execute
2nd Instruction Fetch
T1
T2
T3
T4
2nd Instruction Execute
3rd Instruction Fetch
3rd Instruction Execute
4th Instruction Fetch
clk
CPU
T1
Register Operands Fetch
Result Write Back
ALU Operation Execute
Total Execution Time
T2
T3
T4


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn