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HI-3182 Datasheet(PDF) 2 Page - Holt Integrated Circuits |
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HI-3182 Datasheet(HTML) 2 Page - Holt Integrated Circuits |
2 / 10 page FUNCTIONAL DESCRIPTION The SYNC and CLOCK inputs establish data synchronization utilizing two AND gates, one for each data input. Each logic input, including the power enable ( ) input, are TTL/CMOS compatible. Figure1 illustratesa typical ARINC 429 bus application. Three power supplies are necessary to operate the HI-3182; typically +15V, -15V and +5V. The chip also works with ±12V supplies. The +5V supply can also providea reference voltage that determines the output voltage swing. The differential output voltage swing will equal 2V . Ifa value of V other than +5V is needed,a separate +5V power supply is required for pin V . With the DATA (A) input ata logic high and DATA (B) input at a logic low, A will switch to the +V rail and B will switch to the -V rail (ARINC HIGH state). With both data input signals ata logic low state, the outputs will both switch to 0V (ARINC NULL state). The driver output impedance, R , is nominally 75, 26 or 0 ohms depending on the option chosen. The rise and fall times of the outputs can be calibrated through the selection of two external capacitor values th re connected to the C and C input pins. Typical values for high-speed operation (100KBPS) are C = C = 75pF and for low-speed operation (12.5 to 14KBPS) C = C = 500pF. STROBE REF REF OUT REF OUT REF OUT 1 A B A B A B at a The C and C pins swing between +5V and ground allowing the switching of capacitor values with an external single- supply analog switch. A B The ARINC outputs can be put ina tri-state mode by applying a logic high to the input pin. If this feature is not being used, the pin should be tied to ground. The function is not available in the 14& 16-pin SOIC package configurations where the pin is internally connected to ground. The ARINC outputs of the HI-3182, HI-3184 and HI-3187 are protected by internal fuses capable of sinking between 800 - 900 mA for short periods of time (125 s). STROBE STROBE µ DATA (A) OUT DATA (B) INPUTS TO ARINC BUS B REF V 1 V SYNC CLOCK -V +V STROBE GND C C -15V +15V +5V Figure 1. ARINC 429 BUS APPLICATION HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3187, HI-3188 Figure 2. FUNCTIONAL BLOCK DIAGRAM OUT B Shorted on HI-3186, HI-3187, HI-3188 CL REF FA RL FB OUTPUT DRIVER (B) OUTPUT DRIVER (A) B C GND -V DATA (A) DATA (B) SYNC CLOCK V1 STROBE A C +V LEVEL SHIFTER AND SLOPE CONTROL (B) LEVEL SHIFTER AND SLOPE CONTROL (A) CURRENT REGULATOR 13 Ω 24.5Ω 13 Ω 24.5 Ω Shorted on HI-3183, HI-3186 HI-3187, HI-3188 Shorted on HI-3183, HI-3185 HI-3186, HI-3188 HOLT INTEGRATED CIRCUITS 2 |
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