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HD74ALVCH162543 Datasheet(PDF) 1 Page - Hitachi Semiconductor |
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HD74ALVCH162543 Datasheet(HTML) 1 Page - Hitachi Semiconductor |
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HD74ALVCH162543 16-bit Registered Transceivers with 3-state Outputs ADE-205-183 (Z) Preliminary 1st. Edition December 1996 Description The HD74ALVCH162543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch enable ( LEAB or LEBA) and output enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A to B enable ( CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A to B latches are transparent; a subsequent low to high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using CEBA, LEBA, and OEBA. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and undershoot. Features • V CC = 2.3 V to 3.6 V • Typical V OL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical V OH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors • All outputs have equivalent 26 Ω series resistors, so no external resistors are required. |
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