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HD44780UA00TF Datasheet(PDF) 29 Page - Hitachi Semiconductor |
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HD44780UA00TF Datasheet(HTML) 29 Page - Hitachi Semiconductor |
29 / 59 page HD44780U 29 Set DDRAM Address Set DDRAM address sets the DDRAM address binary AAAAAAA into the address counter. Data is then written to or read from the MPU for DDRAM. However, when N is 0 (1-line display), AAAAAAA can be 00H to 4FH. When N is 1 (2-line display), AAAAAAA can be 00H to 27H for the first line, and 40H to 67H for the second line. Read Busy Flag and Address Read busy flag and address reads the busy flag (BF) indicating that the system is now internally operating on a previously received instruction. If BF is 1, the internal operation is in progress. The next instruction will not be accepted until BF is reset to 0. Check the BF status before the next write operation. At the same time, the value of the address counter in binary AAAAAAA is read out. This address counter is used by both CG and DDRAM addresses, and its value is determined by the previous instruction. The address contents are the same as for instructions set CGRAM address and set DDRAM address. Table 7 Shift Function S/C R/L 0 0 Shifts the cursor position to the left. (AC is decremented by one.) 0 1 Shifts the cursor position to the right. (AC is incremented by one.) 1 0 Shifts the entire display to the left. The cursor follows the display shift. 1 1 Shifts the entire display to the right. The cursor follows the display shift. Table 8 Function Set NF No. of Display Lines Character Font Duty Factor Remarks 00 1 5 × 8 dots 1/8 01 1 5 × 10 dots 1/11 1* 2 5 × 8 dots 1/16 Cannot display two lines for 5 × 10 dot character font Note: * Indicates don’t care. |
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