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HB288256C5 Datasheet(PDF) 12 Page - Hitachi Semiconductor |
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HB288256C5 Datasheet(HTML) 12 Page - Hitachi Semiconductor |
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12 / 67 page  HB288256/192/160/128/096/064/032C5 12 Host access specifications 1. Attribute access specifications When CIS-ROM region or Configuration register region is accessed, read and write operations are executed under the condition of -REG = "L" as follows. That region can be accessed by Byte/Word/Odd-byte modes which are defined by PC card standard specifications. Attribute Read Access Mode Mode -REG -CE2 -CE1 A0 -OE -WE D8 to D15 D0 to D7 Standby mode × HH ××× High-Z High-Z Byte access (8-bit) L H LLLH High-Z even byte L H L H L H High-Z invalid Word access (16-bit) L L L × L H invalid even byte Odd byte access (8-bit) L L H × L H invalid High-Z Note: ×: L or H Attribute Write Access Mode Mode -REG -CE2 -CE1 A0 -OE -WE D8 to D15 D0 to D7 Standby mode × HH ××× Don’t care Don’t care Byte access (8-bit) L H L L H L Don’t care even byte L H L H H L Don’t care Don’t care Word access (16-bit) L L L × H L Don’t care even byte Odd byte access (8-bit) L L H × H L Don’t care Don’t care Note: ×: L or H Attribute Access Timing Example Dout A0 to A10 -REG -CE2/-CE1 -OE -WE D0 to D15 read cycle write cycle Din |
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