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ICS557-01 Datasheet(PDF) 2 Page - Integrated Device Technology |
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ICS557-01 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 10 page ICS557-01 PCI-EXPRESS GEN1 CLOCK SOURCE PCIE IDT® PCI-EXPRESS GEN1 CLOCK SOURCE 2 ICS557-01 REV P 072512 Pin Assignment Pin Descriptions 1 2 3 X1 4 X2 VD D IR E F GN D CL K CL K 8 7 6 5 OE 8 P i n ( 1 5 0 mi l ) S O I C Pin Number Pin Name Pin Type Pin Description 1 OE Input Output Enable signal (H = outputs are enabled, L = outputs are disabled/tristated). Internal pull-up resistor. 2 X1 Input Crystal or clock input. Connect to a 25 MHz crystal or single ended clock. 3 X2 XO Crystal Connection. Connect to a parallel mode crystal. Leave floating if clock input. 4 GND Power Connect to ground. 5 IREF Output A 475 Ω precision resistor connected between this pin and ground establishes the external reference current. 6 CLK Output HCSL differential complementary clock output. 7 CLK Output HCSL differential clock output. 8 VDD Power Connect to +3.3 V. |
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