INTELLIGENT INTERACTIVE SYNTHESIZER

500 - 1200 MHz

wide bandwidth

This product is manufactured under one or more of the following patents. Approved: 5,160,810; 5,122,621; 5,390,349; 5,416,449; 5,650,754; 5,805,431; 6,525,623; 6,850,575;

7,088,189; 7,180,381; 7,196,591; 7,262,670; 7,265,642; 7,292,113; 7,365,612; 7,495,525; 2,548,311; 2,548,317; 7,545,229; 7,580,693; 7,586,381; 7,605,670; 7,636,021; 2,533,623

| Pending: 60/493075; 60/501371 & 60/501790; 60/527957 & 60/528670; 60/563481; 60/564173; 60/589090; 60/601823; 60/605791; EV31369834; 11/259766; 60/622485 &

60/710310; 10/937525/60/736901; 60/732787; 7,495,525; 2,548,311; 2,548,317; 7,545,229; 2,563,174; 7,580,693; 7,612,296; 2,524,751

Copyright © Synergy Microwave Corporation

201 McLean Boulevard • Paterson, New Jersey 07504 USA • Tel: (973) 881-8800 • Fax: (973) 881-8361

E-Mail: sales@synergymwave.com • World Wide Web: http://www.synergymwave.com

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FEATURES:

Phase noise

-170

-160

-150

-140

-130

-120

-110

-100

-90

-80

-70

100

1000

10000

100000

1000000

10000000

100000000

Offset Frequency (Hz)

500 MHz

850 MHz

1200 MHz

SPECIFICATIONS (Rev. B 03/24/11)

Frequency

500 - 1200 MHz

Step Size

500 kHz

Reference

input Frequency

Reference

input Voltage

1.0 V p-p to 3.3 V p-p

bias Voltage

Vcc

V (Vdc)

i (ma Max.)

Digital

+5

15

VCO

+5

45

Tune

+25

10

Lock detect indicator

CMOS 3.3 V

Output Power

0 dBm (Min.)

Spurious Suppression

85 dB (Typ.)

harmonic Suppression

15 dB (Typ.)

Settling time

Output impedance

50 Ohms (Nom.)

Lock detect indicator

CMOS 3.3 V

typical Phase noise

Offset

Phase noise

@ 1 kHz

-96 dBc/Hz

@ 10 kHz

-94 dBc/Hz

@ 100 kHz

-118 dBc/Hz

Operating

temperature Range

-40 to +85 °C

Programming

See Application Note: AN7100

1

Reference input frequency is programmable (See AN7100) in multiples of the step

size,10 MHz is the factory default setting. 150 MHz (Max.)

2

From the rising edge of LE to stable lock detect

Absolute Maximum Ratings

Storage temp. Range

-55 to +125 ºC

bias Voltage (digital)

+5.25 V

bias Voltage (tune)

+28 V

bias Voltage (VCO)

+5.5 V

dC Voltage applied to RF Out

±25 V

Package #

273LF

Port Configuration

Pin 1,2,3 - NC

Pin 4 - Error flag

Pin 5 - Latch Enable In

Pin 6 - Ref. In

Pin 7 - Vcc (Digital)

Pin 8 - Vcc (Tune)

Pin 9 - Vcc (VCO)

Pin 13 - RF Out

Pin 14 - Lock Detect Out *

Pin 15 - Data In

Pin 16 - Clock In

All Others - Ground

NC - No Connection

* High when locked (source/sink 500 uA)