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PS22922 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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PS22922 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
2 / 8 page PS22922 Plessey Semiconductors Ltd, Tamerton Road, Roborough, Plymouth, UK PL6 7BQ Data Sheet 292204 issue 1 Tel: +44 (0)1752 693000 Fax: +44 (0)1752 693200 Web: www.plesseysemiconductors.com email: sales@plesseysemi.com; October 12, 2010 2 Pin Description Symbol Pin # SOT223 Description EN N/A Enable pin. It controls the electrical on/off of the device. When connected to logic low, the device shuts off and consumes less than 1µA of current. Logic high will resume normal operation. ByPass N/A Bypass pin. Connect an external capacitor from BYP to ground to bypass the noise generated by the internal bandgap. This improves power supply rejection ratio and output noise. A minimum capacitor of 220pF is recommended. VIN 1 Input supply pin. Connect a 10µF capacitor between this pin and ground. NC N/A No connect. FB N/A Feedback Voltage. A resistor network of two resistors is used to set-up the output voltage connected between Vout and GND. The center tap of the two resistors is connected to FB pin. For fixed voltage options, the resistors are internally connected to VOUT. VOUT 3 Regulated output Voltage. Connect a 10µF capacitor from this pin to ground. PG N/A Power good. It is an open collector, active high output that indicates the status of the output voltage. When output voltage (VOUT) exceeds the PG trip threshold, the PG pin goes in to a high impedance state. When the device is out of regulation or shutdown, the PG pin is pulled low. A 10K to 1M resistor should be connected from PG to VOUT. GND 2 Ground connection. Tab Expose pad. Connected to PCB ground plane for good thermal dissipation. NB: N/A = Not available in the shown package type Pin Configuration SOT223 (Top View) |
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