PIN

NAME

FUNCTION

1–3

kit data sheet for a layout example.

4

EN/UVLO

Enable/Undervoltage Lockout. Drive EN/UVLO high to enable the output voltage. Connect to the center

5

RESET goes high 1024 clock cycles after FB rises above 95% of its set value.

6

SYNC

The device can be synchronized to an external clock using this pin. See the External Frequency

Synchronization section for more details.

7

SS

Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.

8

CF

At switching frequencies lower than 500kHz, connect a capacitor from CF to FB. Leave CF open if

switching frequency is equal to, or greater than, 500kHz. See the Loop Compensation section for more

details.

9

FB

Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to

set the output voltage. See the Adjusting Output Voltage section for more details.

10

RT

Connect a resistor from RT to SGND to set the regulator’s switching frequency. Leave RT open for the

default 500kHz frequency. See the Setting the Switching Frequency (RT) section for more details.

11

MODE

MODE pin configures the device to operate either in PWM, PFM, or DCM modes of operation. Leave

MODE unconnected for PFM operation (pulse-skipping at light loads). Connect MODE to SGND for

MODE Setting section for more details.

19

20

* EXPOSED PAD (CONNECT TO GROUND).

18

17

7

6

8

9

1

2

LX

4

5

15

14

12

11

LX

BST

FB

CF

SS

SYNC

+

3

13

LX

16

10 RT

PGND

TQFN

4mm × 4mm

MAX17543

TOP VIEW

MAX17543

4.5V–42V, 2.5A, High-Efficiency,

Synchronous Step-Down DC-DC Converter

with Internal Compensation

www.maximintegrated.com

Maxim Integrated │ 10

Pin Description

Pin Configuration