Electronic Components Datasheet Search
  English  ▼

Delete All


Preview PDF Download HTML

FGB20N6S2DT Datasheet(PDF) 8 Page - Fairchild Semiconductor

Part No. FGB20N6S2DT
Description  600V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth Diode
Download  9 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FGB20N6S2DT Datasheet(HTML) 8 Page - Fairchild Semiconductor

  FGB20N6S2DT Datasheet HTML 1Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 2Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 3Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 4Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 5Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 6Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 7Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 8Page - Fairchild Semiconductor FGB20N6S2DT Datasheet HTML 9Page - Fairchild Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 8 / 9 page
background image
©2002 Fairchild Semiconductor Corporation
FGH20N6S2D / FGP20N6S2D / FGB20N6S2D Rev. A1
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge
of energy through the devices. When handling these
devices, care should be exercised to assure that the
static charge built in the handler’s body capacitance
is not discharged through the device. With proper
handling and application procedures, however,
IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with
virtually no damage problems due to electrostatic
discharge. IGBTs can be handled safely if the
following basic precautions are taken:
1. Prior to assembly into a circuit, all leads should be
kept shorted together either by the use of metal
shorting springs or by the insertion into conduc-
tive material such as “ECCOSORBD™ LD26” or
2. When devices are removed by hand from their
carriers, the hand being used should be grounded
by any suitable means - for example, with a
metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed
from circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-
voltage rating of VGEM. Exceeding the rated VGE
can result in permanent damage to the oxide layer
in the gate region.
6. Gate Termination - The gates of these devices
are essentially capacitors. Circuits that leave the
gate open-circuited or floating should be avoided.
These conditions can result in turn-on of the
device due to voltage buildup on the input
capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an
internal monolithic Zener diode from gate to
emitter. If gate protection is required an external
Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating
device performance for a specific application. Other
typical frequency vs collector current (ICE) plots are
possible using the information shown for a typical unit
in Figures 5, 6, 7, 8, 9 and 11. The operating
frequency plot (Figure 3) of a typical device shows
fMAX1 or fMAX2; whichever is smaller at each point.
The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held
to 10% of the on-state time for a 50% duty factor.
Other definitions are possible. td(OFF)I and td(ON)I are
defined in Figure 27. Device turn-off delay can
establish an additional frequency limiting condition for
an application other than TJM. td(OFF)I is important
when controlling output ripple under a lightly loaded
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2).
The allowable dissipation (PD) is defined by
PD =(TJM -TC)/RθJC. The sum of device switching
and conduction losses must not exceed PD. A 50%
duty factor was used (Figure 3) and the conduction
losses (PC) are approximated by PC =(VCE xICE)/2.
EON2 and EOFF are defined in the switching
waveforms shown in Figure 27. EON2 is the integral of
the instantaneous power loss (ICE x VCE) during turn-
on and EOFF is the integral of the instantaneous
power loss (ICE xVCE) during turn-off. All tail losses
are included in the calculation for EOFF; i.e., the
collector current equals zero (ICE = 0)
 is a Trademark of Emerson and Cumming, Inc.

Html Pages

1  2  3  4  5  6  7  8  9 

Datasheet Download

Go To PDF Page

Link URL

Privacy Policy
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com

Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn