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MSC1202 Datasheet(PDF) 55 Page - Texas Instruments |
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MSC1202 Datasheet(HTML) 55 Page - Texas Instruments |
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55 / 93 page  MSC1200 MSC1201 MSC1202 SBAS317E − APRIL 2004 − REVISED MAY 2006 www.ti.com 55 Auxiliary Interrupt Poll (AIPOL) 7 6 5 4 3 2 1 0 Reset Value SFR A4h SECIP SUMIP ADCIP MSECIP I2CIP CNTIP ALVDIP 0 00h Interrupts are enabled by EICON.4 (SFR D8h). The other interrupts are controlled by the IE and EIE registers. SECIP Second System Timer Interrupt Poll (before IRQ masking). bit 7 0 = Second system timer interrupt poll inactive 1 = Second system timer interrupt poll active SUMIP Summation Interrupt Poll (before IRQ masking). bit 6 0 = Summation interrupt poll inactive 1 = Summation interrupt poll active ADCIP ADC Interrupt Poll (before IRQ masking). bit 5 0 = ADC interrupt poll inactive 1 = ADC interrupt poll active MSECIP Millisecond System Timer Interrupt Poll (before IRQ masking). bit 4 0 = Millisecond system timer interrupt poll inactive 1 = Millisecond system timer interrupt poll active I2CIP I2C Start/Stop Interrupt Poll (before IRQ masking). bit 3 0 = I2C start/stop interrupt poll inactive 1 = I2C start/stop interrupt poll active CNTIP Serial Bit Count Interrupt Poll (before IRQ masking). bit 2 0 = Serial bit count interrupt poll inactive 1 = Serial bit count interrupt poll active ALVDIP Analog Low Voltage Detect Interrupt Poll (before IRQ masking). bit 1 0 = Analog low voltage detect interrupt poll inactive (AVDD > ALVD threshold; ALVD threshold set in LVDCON, E7h) 1 = Analog low voltage detect interrupt poll active (AVDD < ALVD threshold; ALVD threshold set in LVDCON, E7h) Pending Auxiliary Interrupt (PAI) 7 6 5 4 3 2 1 0 Reset Value SFR A5h 0 0 0 0 PAI3 PAI2 PAI1 PAI0 00h PAI Pending Auxiliary Interrupt Register. The results of this register can be used as an index to vector to the bits 3−0 appropriate interrupt routine. All of these interrupts vector through address 0033h. PAI3 PAI2 PAI1 PAI0 AUXILIARY INTERRUPT STATUS 0 0 0 0 No Pending Auxiliary IRQ. 0 0 0 1 Reserved. 0 0 1 0 Analog Low Voltage Detect IRQ and Possible Lower Priority Pending. 0 0 1 1 I2C IRQ and Possible Lower Priority Pending. 0 1 0 0 Serial Bit Count Interrupt and Possible Lower Priority Pending. 0 1 0 1 Millisecond System Timer IRQ and Possible Lower Priority Pending. 0 1 1 0 ADC IRQ and Possible Lower Priority Pending. 0 1 1 1 Summation IRQ and Possible Lower Priority Pending. 1 0 0 0 Second System Timer IRQ. |
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