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MSC1202 Datasheet(PDF) 34 Page - Texas Instruments |
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MSC1202 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 93 page  MSC1200 MSC1201 MSC1202 SBAS317E − APRIL 2004 − REVISED MAY 2006 www.ti.com 34 Unused Unused Serial Flash Programming Mode Address User Application Mode Address(1) Unused 1K Internal Boot ROM 0000h, 0k NOTE: (1) Can be accessed using CADDR or the faddr_data_read Boot ROM routine. 1FFFh, 8k (Y3) 0FFFh, 4k (Y2) FC00h F800h FFFFh FFFFh Program Memory 03FFh, 1k 13FFh, 5k (Y3) 0BFFh, 3k (Y2) Data Memory On−Chip Flash On−Chip Flash UAM: Read Only SFPM: Read Only UAM: Read Only SFPM: Read/Write 807Fh 8000h 8040h 7Fh 00h 40h Configuration Memory Figure 20. Memory Map It is important to note that the Flash Memory is readable and writable (depending on the MXWS bit in the MWS SFR) through the MOVX instruction when configured as either Program or Data Memory. This flexibility means that the device can be partitioned for maximum Flash Program Memory size (no Flash Data Memory) and Flash Program Memory can be used as Flash Data Memory. However, this usage may lead to undesirable behavior if the PC points to an area of Flash Program Memory that is being used for data storage. Therefore, it is recommended to use Flash partitioning when Flash Memory is used for data storage. Flash partitioning prohibits execution of code from Data Flash Memory. Additionally, the Program Memory erase/write can be disabled through hardware configuration bits (HCR0), while still providing access (read/write/erase) to Data Flash Memory. The effect of memory mapping on Program and Data Memory is straightforward. The Program Memory is decreased in size from the top of Flash Memory. To maintain compatibility with the MSC121x, the Flash Data Memory maps to addresses 0400h. Therefore, access to Data Memory (through MOVX) will access Flash Memory for the addresses shown in Table 4. Data Memory The MSC120x has on-chip Flash Data Memory, which is readable and writable (depending on the Memory Write Select register) during normal operation (full VDD range). This memory is mapped into the external Data Memory space, which requires the use of the MOVX instruction to program. CONFIGURATION MEMORY The MSC120x Configuration Memory consists of 128 bytes of memory. In UAM, all Configuration Memory is readable using the faddr_data_read Boot ROM routine or CADDR register, but none of the Configuration Memory is writable. In SFPM, all Configuration Memory is readable, but only the lower 64 bytes (8000h−803Fh) are writable; the upper 64 bytes (8040h−807Fh) are not writable. Note that reading/writing configuration memory in SFPM requires 16-bit addressing; whereas, reading configuration memory in UAM requires only 8-bit addressing. Lower 64 Bytes Note that the three hardware configuration registers (HCR0, HCR1, and HCR2) reside in the lower 64 bytes of Configuration Memory and are located in SFPM at addresses 0803Fh, 0803Eh, and 0803Dh, respectively. Therefore, care should be taken when writing to Configuration Memory so that user parameters are not written into these locations. Also note that if the Enable Program Memory Access bit (HCR0.7) is cleared, Configuration Memory cannot be changed unless all memory has been cleared with the Mass Erase command. Upper 64 Bytes Information such as device trim values and device serial number are located in the upper 64 bytes of Configuration Memory. The locations 08050h through 08053h contain a unique 4-byte serial number. The location 8054h contains the temperature sensor correction value (refer to application note SBAA126, available for download from www.ti.com). None of these memory locations can be altered. |
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