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CD74HCT4066-Q1 Datasheet(PDF) 2 Page - Texas Instruments |
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CD74HCT4066-Q1 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 17 page  CD74HCT4066-Q1 HIGH-SPEED CMOS LOGIC QUAD BILATERAL SWITCH SCLS581B − APRIL 2004 − REVISED APRIL 2008 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) nY nZ nE p n p n absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) −0.5 V to +7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V) ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Switch current, IO (see Note 2) (VO > −0.5 V or VO < VCC + 0.5 V) ±25 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output source or sink current per output pin, IO (VO > −0.5 V or VO < VCC + 0.5 V) ±25 mA . . . . . . . . . . . . . . Continuous current through VCC or GND ±50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 3): D package 86 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PW package 113 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages referenced to GND unless otherwise specified. 2. In certain applications, the external load-resistor current may include both VCC and signal-line components. To avoid drawing VCC current when switch current flows into the transmission gate inputs (terminals 1, 4, 8, and 11), the voltage drop across the bidirectional switch must not exceed 0.6 V (calculated from ron values shown in the electrical characteristics table). No VCC current flows through RL if the switch current flows into terminals 2, 3, 9, and 10. 3. The package thermal impedance is calculated in accordance with JESD 51-7. |
Similar Part No. - CD74HCT4066-Q1_14 |
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Similar Description - CD74HCT4066-Q1_14 |
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