LV51130T

No.A1227-5/8

Functional Description

Over-charge detection

If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by

turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time.

This delay time is set by the internal counter.

The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by

connecting the load after detection of over-charge detection. and it becomes small hysteresis comparator has its own.

Once over-charge detection is made, over-current detection is not made to prevent incorrect operations. Note that

short-circuit can be detected.

Over-charge release

If both cell voltages become equal to or less than the over-charge release voltage when VM voltage is equal to or less

than Vd3, or when VM voltage is more than Vd3 with load connected, the Cout pin returns to “H” after the over-

charge release delay time set by the internal counter.

When VM voltage is more than Vd3 with load connected and either cell or both cell voltages are equal to or more

than the over-charge release voltage, the Cout pin does not return to “H”. But the load current flows through the

parasitic diode of external Nch MOS FET on Cout, consequently each cell voltage becomes equal to or less than

over-charge release voltage, the Cout pin returns to “H.” after the over-charge release delay time.

However, excessive voltage charger is connected as mentioned below, Cout pin does not return to “H” because

excessive charger detection starts after over-charge release operation.

Over-discharge detection

When either cell voltage is equal to or less than over-discharge voltage, the IC stops further discharging by turning

the Dout pin “L” and turning off external Nch MOS FET after the over-charge detection delay time.

The IC goes into stand-by mode after detecting over-discharge and its consumption current is kept at about 0A. After

over-discharge detection, the V- pin will be connected to VDD pin via internal resistor (typ 200kΩ).

Over-discharge release

Release from over-discharge is made by only connecting charger. If the V- pin voltage becomes equal to or lower

than the stand-by release voltage by connecting charger after detecting over-discharge, The IC is released from the

stand-by state to start cell voltage monitoring. While both cell voltages are equal to or less than over-discharge

voltages, charging will be made through the parasitic diode of external Nch FET on Dout pin. If both cell voltages

become equal to or more than the over-discharge detection voltage by charging, the Dout pin returns to “H” after the

over-discharge release delay time set by the internal counter.

Over-current detection

When excessive current flows through the battery, the V- pin voltage rises by the ON resister of external MOS FET

and becomes equal to or more than the over-current detection voltage, the Dout pin turns to “L” after the over-current

detection delay time and the external Nch MOS FET is turned off to prevent excessive current in the circuit. The

detection delay time is set by the internal counter. After detection, the V- pin will be connected to VSS via internal

resistor (typ. 30kΩ). It will not go into stand-by mode after detecting over-current.

Short circuit detection

If greater discharging current flows through the battery and the V- pin voltage becomes equal to or more than the

short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than

the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, the

Dout pin turns to “L” and external Nch MOS FET is turned off to prevent high current in the circuit. The V- pin will

be connected to VSS after detection via internal resistor (typ. 30kΩ). It will not go into stand-by mode after detecting

short circuit.

Over-current/short-detection release

After detecting over-current or short circuit, the internal resistor (typ. 30kΩ) between V- pin and VSS pin becomes

effective. If the load resistor is removed, the V- pin voltage will be pulled down to the VSS level. Thereafter, the IC

will be released from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or less

than the over-current detection voltage, and the Dout pin returns to “H” after over-current release delay time set by

the internal counter.