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SN65LVCP404 Datasheet(PDF) 5 Page - Texas Instruments |
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SN65LVCP404 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 23 page RECOMMENDED OPERATING CONDITIONS V CC * |V ID | 2 ELECTRICAL CHARACTERISTICS SN65LVCP404 www.ti.com ................................................................................................................................................... SLLS700B – MARCH 2007 – REVISED JANUARY 2009 MIN NOM MAX UNIT dR Operating data rate 4.25 Gbps VCC Supply voltage 3.135 3.3 3.465 V VCC(N) Supply voltage noise amplitude 10 Hz to 2.125 GHz 20 mV TJ Junction temperature 125 °C TA Operating free-air temperature(1) -40 85 °C DIFFERENTIAL INPUTS dR(in) ≤ 4.25 Gbps 100 1750 mVPP Receiver peak-to-peak differential input VID 1.25 Gbps < dR(in) ≤ 4.25 Gbps 100 1560 mVPP voltage(2) dR(in) > 4.25 Gbps 100 1000 mVPP Receiver common-mode Note: for best jitter performance ac VICM 1.5 1.6 V input voltage coupling is recommended. CONTROL INPUTS VIH High-level input voltage 2 VCC + 0.3 V VIL Low-level input voltage –0.3 0.8 V DIFFERENTIAL OUTPUTS RL Differential load resistance 80 100 120 Ω (1) Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded. (2) Differential input voltage VID is defined as | IN+ – IN– |. over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT DIFFERENTIAL INPUTS Positive going differential VIT+ 50 mV input high threshold Negative going differential VIT– –50 mV input low threshold A(EQ) Equalizer gain at 1.875 GHz (EQ=0) 12 dB Termination resistance, RT(D) 80 100 120 Ω differential Open-circuit Input voltage VBB AC-coupled inputs 1.6 V (input self-bias voltage) Biasing network dc R(BBDC) 30 k Ω impedance 375 MHz 42 Biasing network ac R(BBAC) Ω impedance 2.125 GHz 8.4 DIFFERENTIAL OUTPUTS VODH High-level output voltage 650 mVPP RL = 100 Ω ±1%, VODL Low-level output voltage Px_2 = Px_1=0; –650 mVPP 4 Gbps alternating 1010-pattern; Output differential voltage VODB(PP) 1000 1300 1500 mVPP Figure 3 without preemphasis(2) VOCM Output common mode voltage 1.65 V Change in steady-state See Figure 2 ΔVOC(SS) common-mode output voltage 1 mV between logic states (1) All typical values are at TA = 25°C and VCC = 3.3 V supply unless otherwise noted. They are for reference purposes and are not production tested. (2) Differential output voltage V(ODB) is defined as | OUT+ – OUT– |. Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): SN65LVCP404 |
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