LM3410

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SNVS541F – OCTOBER 2007 – REVISED AUGUST 2010

Table 1. Pin Descriptions - 5-Pin SOT23

Pin

Name

Function

1

SW

Output switch. Connect to the inductor, output diode.

2

GND

Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin.

3

FB

Feedback pin. Connect FB to external resistor divider to set output voltage.

Dimming & shutdown control input. Logic high enables operation. Duty Cycle from 0 to 100%. Do not allow this pin to

4

DIM

float or be greater than VIN + 0.3V.

5

VIN

Supply voltage pin for power stage, and input supply voltage.

Table 2. Pin Descriptions - 6-Pin LLP

Pin

Name

Function

1

PGND

Power ground pin. Place PGND and output capacitor GND close together.

2

VIN

Supply voltage for power stage, and input supply voltage.

Dimming & shutdown control input. Logic high enables operation. Duty Cycle from 0 to 100%. Do not allow this pin to

3

DIM

float or be greater than VIN + 0.3V.

4

FB

Feedback pin. Connect FB to external resistor divider to set output voltage.

5

AGND

Signal ground pin. Place the bottom resistor of the feedback network as close as possible to this pin & pin 4.

6

SW

Output switch. Connect to the inductor, output diode.

DAP

GND

Signal & Power ground. Connect to pin 1 & pin 5 on top layer. Place 4-6 vias from DAP to bottom layer GND plane.

Table 3. Pin Descriptions - 8-Pin eMSOP

Pin

Name

Function

1

-

No Connect

2

PGND

Power ground pin. Place PGND and output capacitor GND close together.

3

VIN

Supply voltage for power stage, and input supply voltage.

Dimming & shutdown control input. Logic high enables operation. Duty Cycle from 0 to 100%. Do not allow this pin to

4

DIM

float or be greater than VIN + 0.3V.

5

FB

Feedback pin. Connect FB to external resistor divider to set output voltage.

6

AGND

Signal ground pin. Place the bottom resistor of the feedback network as close as possible to this pin & pin 5

7

SW

Output switch. Connect to the inductor, output diode.

8

-

No Connect

DAP

GND

Signal & Power ground. Connect to pin 2 & pin 6 on top layer. Place 4-6 vias from DAP to bottom layer GND plane.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

-0.5V to 7V

SW Voltage

-0.5V to 26.5V

FB Voltage

-0.5V to 3.0V

DIM Voltage

-0.5V to 7.0V

Human Body Model

2kV

150°C

Storage Temp. Range

-65°C to 150°C

Soldering Information

Infrared/Convection Reflow (15sec)

220°C

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and

conditions, see the Electrical Characteristics.

(2)

The human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. Test method is per JESD22-A114.

(3)

Thermal shutdown will occur if the junction temperature exceeds the maximum junction temperature of the device.

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