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SRC848XR2H000P2 Datasheet(PDF) 3 Page - OPLINK Communications Inc.

Part # SRC848XR2H000P2
Description  Receiver with Clock Recovery
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Manufacturer  OPLINK [OPLINK Communications Inc.]
Direct Link  http://www.oplink.com
Logo OPLINK - OPLINK Communications Inc.

SRC848XR2H000P2 Datasheet(HTML) 3 Page - OPLINK Communications Inc.

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Oplink Communications, Inc.
Application Notes
Optical Power Monitor Interface Circuit
Typical DATA output Eye Pattern
Typical Jitter Tolerance Measurement
Timing Diagram
Typical Jitter Transfer Function
External
Monitor Resistor
(about 3 Kohm)
APD/PIN
Current
Monitor
SRC-48
PM (Pin 3)
VCC
DATA
CLOCK
T
CSP
SRC48
R3.2009.04.30
3
The receiver converts the incident optical power to a
photocurrent via a high performance P-I-N photodiode (Short
and Intermediate Reach version) or an avalanche photodiode
(Long Reach version).The photocurrent can be monitored via
thevoltagedropacrossanexternalresistorconnectedbetween
PM and V
CC. The APD Bias Voltage is internally generated from
the +5 V supply by a low noise DC-DC converter. The APD
Bias Voltage is temperature compensated to ensure stable
operation over the entire operating temperature range.the
entire operating temperature range.
BothDATAandCLOCKoutputsaredifferentialsignalsdesigned
to be AC-coupled into 50 ohm load. Transmission lines are
recommended for best performance. The Signal Detect
circuit monitors the level of the incoming optical signal and
generates a logic LOW signal at the SIGNAL DETECT+ output
when insufficient photocurrent is produced. No termination
resistor is required for the SIGNAL DETECT outputs.


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