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LM5041 Datasheet(PDF) 10 Page - Texas Instruments

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Part # LM5041
Description  Cascaded PWM Controller
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM5041 Datasheet(HTML) 10 Page - Texas Instruments

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LM5041
SNVS248C – MAY 2004 – REVISED MAY 2004
www.ti.com
The external VCC capacitor must be sized such that the capacitor maintains a VCC voltage greater than 7V during
the initial start-up. During a fault mode when the converter auxiliary winding is inactive, external current draw on
the VCC line should be limited so the power dissipated in the start-up regulator does not exceed the maximum
power dissipation of the controller.
An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the VCC
and the VIN pins together and feeding the external bias voltage into the two pins.
Line Under-Voltage Detector
The LM5041 contains a line Under-Voltage Lockout (UVLO) circuit. An external set-point resistor divider from VIN
to ground sets the operational range of the converter. The divider must be designed such that the voltage at the
UVLO pin will be greater than 2.5V when VIN is in the desired operating range. If the Under-Voltage threshold is
not met, all functions of the controller are disabled and the controller will enter a low-power state with input
current <300µA. ULVO hysteresis is accomplished with an internal 20µA current source that is switched on or off
into the impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is
activated to instantly raise the voltage at the UVLO pin. When the UVLO pin falls below the 2.5V threshold, the
current source is turned off causing the voltage at the UVLO pin to fall. The UVLO pin can also be used to
implement a remote enable / disable function. By shorting the UVLO pin to ground, the converter can be
disabled. The controller can also be disabled through the soft-start pin (SS). The controller will enter a low-power
off state if the SS pin is forced below the 0.45V shutdown threshold.
Buck Stage Control Outputs
The LM5041 Buck switch maximum duty cycle clamp ensures that there will be sufficient off time each cycle to
recharge the bootstrap capacitor used in the high side gate driver. The Buck switch is guaranteed to be off, and
the sync switch on, for at least 250ns per switching cycle. The Buck stage control outputs (LD and HD) are
CMOS buffers with logic levels of 0 to 5V.
During any fault state or Under-Voltage off state, the buck stage control outputs will default to HD low and LD
high.
Push-Pull Outputs
The push pull outputs operate continuously at a nominal 50% duty cycle. A distinguishing feature of the LM5041
is the ability to accurately configure either dead time (both-off) or overlap time (both-on) on the complementary
push-pull outputs. The overlap/dead time magnitude is controlled by a resistor connected to the TIME pin on the
controller. The TIME pin holds one end of the resistor at 2.5V and the other end of the resistor should be
connected to either REF for dead time control setting or to GND for overlap control. The polarity of the current in
the TIME is detected by the LM5041 The magnitude of the overlap/dead time can be calculated as follows:
Overlap Time (ns) = (3.66 x RSET) + 7
Overlap Time in ns, RSET connected to GND, RSET in kΩ
Dead Time (ns) = (3.69 x RSET) + 21
Dead Time in ns, RSET connected to REF, RSET in kΩ
Recommended RSET programming range: 10kΩ to 100kΩ
Current-fed designs require a period of overlap to insure there is a continuous path for the buck inductor current.
Voltage-fed designs require a period of dead time to insure there is no time when the push-pull transformer acts
as a shorted turn to the low impedance sourcing node. The push-pull outputs alternate continuously under all
conditions provided REF the voltage is greater than 3V.
10
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Copyright © 2004, Texas Instruments Incorporated
Product Folder Links: LM5041


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