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LM3691 Datasheet(PDF) 15 Page - Texas Instruments |
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LM3691 Datasheet(HTML) 15 Page - Texas Instruments |
15 / 23 page V PP-RMS = V PP-C 2 + V PP-ESR 2 VPP-C = 4*f*C IRIPPLE LM3691 www.ti.com SNVS506H – MAY 2008 – REVISED SEPTEMBER 2011 The output voltage ripple is caused by the charging and discharging of the output capacitor and also due to its RESR and can be calculated as: Voltage peak-to-peak ripple due to capacitance = (2) Voltage peak-to-peak ripple due to ESR = VPP-ESR = (2 * IRIPPLE) * RESR Because these two components are out of phase the rms value can be used to get an approximate value of peak-to-peak ripple. Voltage peak-to-peak ripple, root mean squared = (3) Note that the output voltage ripple is dependent on the current ripple and the equivalent series resistance of the output capacitor (RESR). The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations is at the switching frequency of the part. Table 2 lists suggested capacitors and suppliers. Table 1. Suggested Inductors and Their Suppliers Model Vendor Dimensions LxWxH (mm) D.C.R (m Ω) LQM2HPN1R0MG0 Murata 2.5 x 2.0 x 1.0 55 MLP2520S1R0L TDK 2.5 x 2.0 x 1.0 60 KSLI252010BG1R0 HItachi Metals 2.5 x 2.0 x 1.0 80 MIPSZ2012D1R0 FDK 2.0 x 1.25 x 1.0 90 Table 2. Suggested Capacitors and Their Suppliers Case Size Model Type Vendor Voltage Rating (V) Inch (mm) 4.7 µF for CIN and COUT C1608X5R0J475K Ceramic TDK 6.3 0603 (1608) C1608X5R1A475K Ceramic TDK 10.0 0603 (1608) PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. In particular parasitic inductance from extra-long PCB trace lengths can cause additional noise voltages through L*di/dt that adversely affect the DC-DC converter IC circuitry. Good layout for the LM3691 can be implemented by following a few simple design rules. 1. Place the inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. 2. Place the capacitors and inductor close to the LM3691. Place the CIN capacitor as close as possible to the VIN and GND pads. Place the COUT capacitor as close as possible to the VOUT and GND connections. 3. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the buck and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the buck by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 4. Connect the ground pins of the buck and filter capacitors together using generous component-side copper fill Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: LM3691 |
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