LM3500

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SNVS231F – MAY 2004 – REVISED APRIL 2007

FB(pin B3): Output voltage feedback connection. Set the primary White LED network current with a resistor from

the FB pin to GND. Keep the current setting resistor close to the device and connected between the FB and

GND pins.

NC(pin A3): No internal connection is made to this pin. The maximum allowable voltage that can be applied to

this pin is 7.5V.

SHDN(pin A2): Shutdown control pin. Disable the device with a voltage less than 0.3V and enable the device

with a voltage greater than 1.1V. The white LED current can be controlled using a PWM signal at this pin. There

is an internal pull down on the SHDN pin, the device is in a normally off state.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

−0.3V to 7.5V

(2)

−0.3V to 16V

(2)

−0.3V to 21V

(2)

FB, SHDN, and NC Voltages

−0.3V to 7.5V

Maximum Junction Temperature

150°C

Lead Temperature

(3)

300°C

Human Body Model

2kV

Machine Model

200V

(1)

Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the

device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test

conditions, see the Electrical Characteristics.

(2)

(3)

For more detailed soldering information and specifications, please refer to National Semiconductor Application Note 1112: Micro SMD

Wafer Level Chip Scale Package (AN-1112), available at www.national.com.

(4)

The human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. The machine model is a 200 pF

capacitor discharged directly into each pin.

Operating Conditions

Ambient Temperature

(1)

−40°C to +85°C

Junction Temperature

−40°C to +125°C

Supply Voltage

2.7V to 7V

(1)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

part/package in the application (

Thermal Properties

Junction to Ambient Thermal Resistance (

(1)

75°C/W

(1)

Junction-to-ambient thermal resistance (

measured on a 4-layer test board conforming to JEDEC standards. In applications where high maximum power dissipation exists,

special care must be paid to thermal dissipation issues when designing the board layout.

Copyright © 2004–2007, Texas Instruments Incorporated

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