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TLV320AIC3262 Datasheet(PDF) 42 Page - Texas Instruments |
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TLV320AIC3262 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 65 page  HPL HPR HPVSS_SENSE TLV320AIC3262 SLAS679 – DECEMBER 2011 www.ti.com Headphone Outputs The stereo headphone drivers on pins HPL and HPR can drive loads with impedances down to 16 Ω in single- ended DC-coupled headphone configurations. An integral charge pump generates the negative supply required to operate the headphone drivers in dc-coupled mode, where the common mode of the output signal is made equal to the ground of the headphone load using a ground-sense circuit. Operation of headphone drivers in dc- coupled (ground centered mode) eliminates the need for large dc-blocking capacitors. Figure 24. TLV320AIC3262 Ground-Centered Headphone Output Alternatively the headphone amplifier can also be operated in a unipolar circuit configuration using DC blocking capacitors. Stereo Line Outputs The stereo line level drivers on LOL and LOR pins can drive a wide range of line level resistive impedances in the range of 600 Ω to 10kΩ. The output common mode of line level drivers can be configured to equal the analog input common-mode setting, either 0.75V or 0.9V. The line-level drivers can drive out a mixed combination of DAC signal and attenuated ADC PGA signal, and signal mixing is register-programmable. Differential Receiver Output The differential receiver amplifier output spans the RECP and RECM pins and can drive a 32 Ω receiver driver. With output common-mode setting of 1.65V and RECVDD_33 supply at 3.3V, the receiver driver can drive up to a 1Vrms output signal. With the RECVDD_33 supply at 3.3V, the receiver driver can deliver greater than 128mW into a 32 Ω BTL load. If desired, the RECVDD_33 supply can be set to 1.8V, at which the driver can deliver about 40mW into the 32 Ω BTL load. Stereo Class-D Speaker Outputs The integrated Class-D stereo speaker drivers (SPKLP/SPKLN and SPKRP/SPKRN) are capable of driving two 8 Ω differential loads. The speaker drivers can be powered directly from the power supply (2.7V to 5.5V) on the SLVDD and SRVDD pins, however the voltage (including spike voltage) must be limited below the Absolute Maximum Voltage of 6.0V. The speaker drivers are capable of supplying 750 mW per channel at 10% THD+N with a 3.6-V power supply and 1.46W per channel at 10% THD+N with a 5.0V power supply. Separate left and right channels can be sent to each Class-D driver through the Lineout signal path, or from the mixer amplifiers in the ADC bypass. If only one speaker is being utilized for playback, the analog mixer before the Left Speaker amplifier can sum the left and right audio signals for monophonic playback. ADC / Digital Microphone Interface The TLV320AIC3262 includes a stereo audio ADC, which uses a delta-sigma modulator with a programmable oversampling ratio, followed by a digital decimation filter and a programmable miniDSP. The ADC supports sampling rates from 8kHz to 192kHz. In order to provide optimal system power management, the stereo recording path can be powered up one channel at a time, to support the case where only mono record capability is required. 42 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TLV320AIC3262 |
Similar Part No. - TLV320AIC3262_14 |
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