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URB2403LD-20W Datasheet(PDF) 2 Page - MORNSUN Science& Technology Ltd.

Part No. URB2403LD-20W
Description  ULTRA WIDE INPUT , ISOLATED & REGULATED SINGLE OUTPUT DC-DC CONVERTER
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Maker  MORNSUN [MORNSUN Science& Technology Ltd.]
Homepage  http://www.mornsun-power.com
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URB2403LD-20W Datasheet(HTML) 2 Page - MORNSUN Science& Technology Ltd.

   
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The copyright and authority for the interpretation of the products are reserved by MORNSUN
Specifications subject to change without notice.
URB_LD-20W
2013.06.13-A/4
Page 2 of 3
OUTPUT SPECIFICATIONS
RECOMMENDED CIRCUIT
Item
Test conditions
Min.
Typ.
Max.
Units
Output power
See product program
2
--
20
W
Output voltage accuracy Refer to recommended circuit
--
±1
±3
Load regulation
From 10% to 100% load
--
±0.5
±1
Line regulation
Input voltage from low to high
100% load
--
±0.2
±0.5
%
Ripple and noise
20MHz bandwidth
55
75
150
mV
Transient recovery time
--
200
500
us
Transient peak deviation
25% load step change
--
±3
±5
%
Over current protection
Input voltage range
120
130
150
%
Short circuit protection
Input voltage range
Hiccup, automatic recovery
3.3V output
--
3.9
--
5V output
--
6.2
--
12V output
--
15
--
Over voltage protection
15V output
--
18
--
VDC
Temperature drift (Vout)
Refer to recommended circuit
--
±0.02
--
%/
°C
Trim
--
±10%V
o
--
VDC
1) Recommended circuit
All the URB_LD-20W series have been tested
according to the following recommended testing
circuit before leaving factory. This series should be
tested under load. Never be tested under no load
(see Figure 1).
DC
DC
Vin
GND
+Vo
0V
C in
C o ut
(Figure 1)
If you want to further decrease the output ripple,
you can increase capacitance properly or choose
capacitors with low ESR. However, the capacitance
can
’t exceed the maximum capacitor load in the list.
2) Recommended capacitance
Capacitance
Output
voltage
Cout(
μF)
Cin(
μF)
(24V,48V Input)
3.3(VDC)
470
5(VDC)
470
12(VDC)
220
15(VDC)
220
24(VDC)
100
100
3) No parallel connection or plug and play
TRIM APPLICATION & TRIM RESISTANCE
DERATING & EFFICIENCY CURVE
Application circuit for TRIM (Part in broken line is the interior of models)
0V
R2
R1
R3
Vref
RT
Trim
+Vo
0V
R2
R1
R3
Vref
RT
Trim
+Vo
Trim up
Trim down
Formula for resistance of Trim
up:
a=
Vref
Vo
’-Vref
R1
R=
T
aR2
R -a
2
-R3
down:
a=
Vref
Vo
’-Vref
R2
R=
T
aR1
R -a
1
-R3
Note: Value for R1, R2, R3, and Vref refer to the following table.
RT: Resistance of Trim
a: User-defined parameter, no actual meanings.
Vo
’: The trim up/down voltage
Vo
Resistance
3.3
(VDC)
5
(VDC)
12
(VDC)
15
(VDC)
24
(VDC)
R1(K
Ω)
4.80
2.88
10.97
14.50
24.87
R2(K
Ω)
2.86
2.86
2.86
2.86
2.86
R3(K
Ω)
15
10
17.8
17.8
20
Vref(V)
1.24
2.5
2.5
2.5
2.5
1) Temperature derating curve
(Output Voltage
≤ 5V)
Operating Temp(
)
C
(Output Voltage > 5V)
Operating Temp(
)
C
2) Efficiency VS Input Voltage
URB2405LD-20W
70
72
74
76
78
80
82
84
86
88
90
9
12 15 18 21 24 27 30 33 36
Input Voltage(V)
3) Efficiency VS Output Load
URB2405LD-20W
0
10
20
30
40
50
60
70
80
90
10 20 30 40 50 60 70 80 90 100
Output Load %Io


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