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DS99R101 Datasheet(PDF) 10 Page - Texas Instruments |
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DS99R101 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 30 page  RIN± TRI-STATE TRI-STATE TRI-STATE TRI-STATE TRI-STATE ROUT [0:23] RCLK TRI-STATE LOCK }v [š Œ tHZR or tLZR tDRDL REN PWDN 2.0V 0.8V VOH REN VOL + 0.5V VOL ROUT [23:0] VOL + 0.5V tLZR 500: VREF = VDD/2 for tZLR or tLZR, VOH - 0.5V VOH + 0.5V tZLR tHZR tZHR VDD/2 VDD/2 VOH VOL REN VREF + - VREF = 0V for tZHR or tHZR CL = 8pF DS99R101, DS99R102 SNLS240D – MARCH 2007 – REVISED APRIL 2013 www.ti.com Note: CL includes instrumentation and fixture capacitance within 6 cm of ROUT[23:0] Figure 13. Deserializer TRI-STATE Test Circuit and Timing Figure 14. Deserializer PLL Lock Times and RPWDNB TRI-STATE Delay 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: DS99R101 DS99R102 |
Similar Part No. - DS99R101_14 |
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Similar Description - DS99R101_14 |
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