DAC121S101

SNAS265H – JUNE 2005 – REVISED FEBRUARY 2010

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A.C. and Timing Characteristics

Units

Symbol

Parameter

Conductions

Typical

Limits

(Limits)

SCLK Frequency

30

MHz (max)

8

10

µs (max)

400h to C00h code

12

µs

8

µs

00Fh to FF0h code

12

µs

SR

Output Slew Rate

1

V/µs

Glitch Impulse

Code change from 800h to 7FFh

12

nV-sec

Digital Feedthrough

0.5

nV-sec

6

µs

Wake-Up Time

39

µs

SCLK Cycle Time

33

ns (min)

SCLK High time

5

13

ns (min)

SCLK Low Time

5

13

ns (min)

Set-up Time SYNC to SCLK Rising

−15

0

ns (min)

Edge

Data Set-Up Time

2.5

5

ns (min)

Data Hold Time

2.5

4.5

ns (min)

0

3

ns (min)

SCLK fall to rise of SYNC

−2

1

ns (min)

2.7

9

20

ns (min)

SYNC High Time

3.6

5

10

ns (min)

(1)

This parameter is guaranteed by design and/or characterization and is not tested in production.

Specification Definitions

DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1

DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital

inputs when the DAC outputs are not updated. It is measured with a full-scale code change on the data bus.

FULL-SCALE ERROR is the difference between the actual output voltage with a full scale code (FFFh) loaded

GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated from Zero and

Full-Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE is Full-Scale Error and ZE is Zero Error.

GLITCH IMPULSE is the energy injected into the analog output when the input code to the DAC register

changes. It is specified as the area of the glitch in nanovolt-seconds.

INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a straight line

through the input to output transfer function. The deviation of any given code from this straight line is measured

from the center of that code value. The end point method is used. INL for this product is specified over a limited

range, per the Electrical Characteristics.

LEAST SIGNIFICANT BIT (LSB) is the bit that has the smallest value or weight of all bits in a word. This value is

n

(1)

DAC121S101.

MAXIMUM LOAD CAPACITANCE is the maximum capacitance that can be driven by the DAC with output

stability maintained.

6

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