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NVT2003DP Datasheet(PDF) 9 Page - NXP Semiconductors

Part # NVT2003DP
Description  Bidirectional voltage-level translator for open-drain and push-pull applications
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

NVT2003DP Datasheet(HTML) 9 Page - NXP Semiconductors

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NVT2003_04_06
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 5 — 19 February 2014
9 of 33
NXP Semiconductors
NVT2003/04/06
Bidirectional voltage-level translator
7.4 How to size pull-up resistor value
Sizing the pull-up resistor on an open-drain bus is specific to the individual application and
is dependent on the following driver characteristics:
The driver sink current
The VOL of driver
The VIL of the driver
Frequency of operation
The following tables can be used to estimate the pull-up resistor value in different use
cases so that the minimum resistance for the pull-up resistor can be found.
Table 6, Table 7 and Table 8 contain suggested minimum values of pull-up resistors for
the PCA9306 and NVT20xx devices with typical voltage translation levels and drive
currents. The calculated values assume that both drive currents are the same.
VOL =VIL =0.1  VCC and accounts for a 5%VCC tolerance of the supplies, 1%
resistor values. It should be noted that the resistor chosen in the final application should
be equal to or larger than the values shown in Table 6, Table 7 and Table 8 to ensure that
the pass voltage is less than 10 % of the VCC voltage, and the external driver should be
able to sink the total current from both pull-up resistors. When selecting the minimum
resistor value in Table 6, Table 7 or Table 8, the drive current strength that should be
chosen should be the lowest drive current seen in the application and account for any
drive strength current scaling with output voltage. For the GTL devices, the resistance
table should be recalculated to account for the difference in ON resistance and bias
voltage limitations between VCC(B) and VCC(A).
The applied enable voltage Vpu(H) and the applied voltage at Vref(A) and Vref(B) should be such that Vref(H) is at least 1 V higher
than Vref(A) and Vref(B) for best translator operation.
Fig 10. Bidirectional level shifting between two different power domains
002aae967
A1
A2
VREFA
GND
3
4
VREFB
1
8
7
B1
B2
10 EN
SW
SW
NVT2003
9
200 k
Ω
RPU
RPU
Vpu(B) = 3.3 V
I2C-BUS
DEVICE
SCL
SDA
VCC
GND
2
Vpu(A) = 3.3 V
RPU
RPU
I2C-BUS
MASTER
SCL
SDA
VCC
GND
Vpu(H)
A3
5
6
SW
B3
Vpu(B)


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