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THS3092D Datasheet(PDF) 7 Page - Texas Instruments |
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THS3092D Datasheet(HTML) 7 Page - Texas Instruments |
7 / 45 page www.ti.com ELECTRICAL CHARACTERISTICS (continued) TYPICAL CHARACTERISTICS TABLE OF GRAPHS THS3092 THS3096 SLOS428B – DECEMBER 2003 – REVISED FEBRUARY 2006 V S = ±5 V, RF = 909 Ω, RL = 100 Ω, and G = 2 (unless otherwise noted) TYP OVER TEMPERATURE PARAMETER TEST CONDITIONS 0°C to -40°C to MIN/TYP/ 25°C 25°C UNIT 70°C 85°C MAX OUTPUT CHARACTERISTICS RL = 1 kΩ ±3.4 ±3.1 ±2.8 ±2.8 Output voltage swing V MIN RL = 100 Ω ±3.1 ±2.7 ±2.5 ±2.5 Output current (sourcing) RL = 10 Ω 200 160 140 140 mA MIN Output current (sinking) RL = 10 Ω 180 150 125 125 mA MIN Output impedance f = 1 MHz, Closed loop 0.09 Ω TYP POWER SUPPLY Specified operating voltage ±5 ±4.5 ±4.5 ±4.5 V MAX Maximum quiescent current 8.2 9 9.5 9.5 mA MAX Per channel Minimum quiescent current 8.2 7 6.5 6.5 mA MIN Power supply rejection (+PSRR) VS+ = 5.5 V to 4.5 V, VS- = -5 V 73 68 63 63 dB MIN Power supply rejection (-PSRR) VS+ = 5 V, VS- = -4.5 V to 5.5 V 71 65 60 60 dB MIN POWER-DOWN CHARACTERISTICS (THS3096 ONLY) VS+ – 4 MAX REF voltage range(1) VS– MIN V Enable PD ≥ REF + 2 MIN Power-down voltage level(1) Disable PD ≤ REF + 0.8 MAX Power-down quiescent current PD = 0V 300 500 600 600 µA MAX VPD = 0 V, REF = 0 V, 11 15 20 20 VPD quiescent current µA MAX VPD = 3.3 V, REF = 0 V 11 15 20 20 Turnon time delay 90% of final value 60 µs TYP Turnoff time delay 10% of final value 150 (1) For detailed information on th behavior of the powerdown circuit, see the Powerdown and Powerdown Reference sections in the Application Information of this data sheet. FIGURE ±15-V graphs Noninverting frequency response 1, 2 Inverting frequency response 3 0.1 dB flatness 4 Noninverting frequency response 5 Inverting frequency response 6 Frequency response capacitive load 7 Recommended RISO vs Capacitive load 8 2nd Harmonic distortion vs Frequency 9, 11 3rd Harmonic distortion vs Frequency 10, 12 Slew rate vs Output voltage step 13, 14, 15 Noise vs Frequency 16 Settling time 17, 18 Quiescent current vs Supply voltage 19 Output voltage vs Load resistance 20 Input bias and offset current vs Case temperature 21 Input offset voltage vs Case temperature 22 7 Submit Documentation Feedback |
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