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MCIMX6S5EVM10AB Datasheet(PDF) 78 Page - Freescale Semiconductor, Inc

Part # MCIMX6S5EVM10AB
Description  Applications Processors for Consumer Products
Download  168 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MCIMX6S5EVM10AB Datasheet(HTML) 78 Page - Freescale Semiconductor, Inc

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i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 3
78
Freescale Semiconductor
Electrical Characteristics
64
Clock low period:
• For internal clock
• For external clock
2
 T
c 9.0
2
 T
c
6
15
ns
65
ESAI_RX_CLK rising edge to ESAI_RX_FS out (bl) high
17.0
7.0
x ck
i ck a
ns
66
ESAI_RX_CLK rising edge to ESAI_RX_FS out (bl) low
17.0
7.0
x ck
i ck a
ns
67
ESAI_RX_CLK rising edge to ESAI_RX_FS out (wr)
high5
19.0
9.0
x ck
i ck a
ns
68
ESAI_RX_CLK rising edge to ESAI_RX_FS out (wr) low5
19.0
9.0
x ck
i ck a
ns
69
ESAI_RX_CLK rising edge to ESAI_RX_FS out (wl) high
16.0
6.0
x ck
i ck a
ns
70
ESAI_RX_CLK rising edge to ESAI_RX_FS out (wl) low
17.0
7.0
x ck
i ck a
ns
71
Data in setup time before ESAI_RX_CLK (SCK in
synchronous mode) falling edge
12.0
19.0
x ck
i ck
ns
72
Data in hold time after ESAI_RX_CLK falling edge
3.5
9.0
x ck
i ck
ns
73
ESAI_RX_FS input (bl, wr) high before ESAI_RX_CLK
falling edge5
2.0
12.0
x ck
i ck a
ns
74
ESAI_RX_FS input (wl) high before ESAI_RX_CLK
falling edge
2.0
12.0
x ck
i ck a
ns
75
ESAI_RX_FS input hold time after ESAI_RX_CLK falling
edge
2.5
8.5
x ck
i ck a
ns
78
ESAI_TX_CLK rising edge to ESAI_TX_FS out (bl) high
18.0
8.0
x ck
i ck
ns
79
ESAI_TX_CLK rising edge to ESAI_TX_FS out (bl) low
20.0
10.0
x ck
i ck
ns
80
ESAI_TX_CLK rising edge to ESAI_TX_FS out (wr)
high5
20.0
10.0
x ck
i ck
ns
81
ESAI_TX_CLK rising edge to ESAI_TX_FS out (wr) low5
22.0
12.0
x ck
i ck
ns
82
ESAI_TX_CLK rising edge to ESAI_TX_FS out (wl) high
19.0
9.0
x ck
i ck
ns
83
ESAI_TX_CLK rising edge to ESAI_TX_FS out (wl) low
20.0
10.0
x ck
i ck
ns
84
ESAI_TX_CLK rising edge to data out enable from high
impedance
22.0
17.0
x ck
i ck
ns
86
ESAI_TX_CLK rising edge to data out valid
18.0
13.0
x ck
i ck
ns
Table 55. Enhanced Serial Audio Interface (ESAI) Timing (continued)
No.
Characteristics1,2
Symbol
Expression2
Min
Max
Condition3 Unit


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