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HSSR-7112 Datasheet(PDF) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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HSSR-7112 Datasheet(HTML) 10 Page - AVAGO TECHNOLOGIES LIMITED |
10 / 11 page 10 Applications Information Thermal Model The steady state thermal model for the HSSR-7110 is shown in Figure 21. The thermal resistance values given in this model can be used to calculate the temperatures at each node for a given operating condition. The thermal resistances between the LED and other internal nodes are very large in comparison with the other terms and are omitted for simplicity. The components do, however, interact indirectly through θCA, the case-to-ambient thermal resistance. All heat generated flows through θCA, which raises the case temperature TC accordingly. The val- ue of θCA depends on the conditions of the board design and is, therefore, determined by the designer. The maximum value for each output MOSFET junction- to-case thermal resistance is specified as 15°C/W . The thermal resistance from FET driver junction-to-case is also 15°C/W/W. The power dissipation in the FET driver, how- ever, is negligible in comparison to the MOSFETs. On-Resistance and Rating Curves The output on-resistance, RON, specified in this data sheet, is the resistance measured across the output contact when a pulsed current signal (IO = 800 mA) is applied to the output pins. The use of a pulsed signal (≤ 30 ms) im- plies that each junction temperature is equal to the am- bient and case temperatures. The steadystate resistance, RSS, on the other hand, is the value of the resistance mea- sured across the output contact when a DC current signal is applied to the output pins for a duration sufficient to reach thermal equilibrium. RSS includes the effects of the temperature rise of each element in the thermal model. Rating curves are shown in Figures 2 and 4. Figure 2 speci- fies the maximum average output current allowable for a given ambient temperature. Figure 4 specifies the output power dissipation allowable for a given ambient tempera- ture. Above 55°C (for θCA = 80°C/W) and 107°C (for θCA = 40°C/W/W), the maximum allowable output current and power dissipation are related by the expression RSS = PO(max)/ (IO(max))2 from which RSS can be calculated. Stay- ing within the safe area assures that the steady-state junc- tion temperatures remain less than 150°C. As an example, for TA = 95°C and θCA = 80°C/W , Figure 2 shows that the output current should be limited to less than 610 mA. A check with Figure 4 shows that the output power dissipa- tion at TA = 95°C and IO = 610 mA, will be limited to less than 0.35 W. This yields an RSS of 0.94 Ω. Figure 20. Burn-In Circuit. NOTE: IN ORDER TO DETERMINE V BE MEASURED FOR THE BURN-IN BOARDS TO BE USED. THEN, KNOWING CORRECT OUTPUT CURRENT PER FIGURES 2 AND 4 TO INSURE THAT THE DEVICE MEETS THE DERATING REQUIREMENTS AS SHOWN. OUT CORRECTLY, THE CASE TO AMBIENT THERMAL IMPEDANCE MUST CA , DETERMINE THE 2 3 4 1 6 7 5 8 R IN V IN 5.5 V 1.0 R OUT V O (SEE NOTE) 200 1.0 R OUT HSSR-7110 Figure 21. Thermal Model. T je = LED JUNCTION TEMPERATURE T jf1 = FET 1 JUNCTION TEMPERATURE T jf2 = FET 2 JUNCTION TEMPERATURE T jd = FET DRIVER JUNCTION TEMPERATURE T C = CASE TEMPERATURE (MEASURED AT CENTER OF PACKAGE BOTTOM) T A = AMBIENT TEMPERATURE (MEASURED 6" AWAY FROM THE PACKAGE) CA = CASE-TO-AMBIENT THERMAL RESISTANCE ALL THERMAL RESISTANCE VALUES ARE IN ˚C/W T je CA 104 15 T A T C T jd T jf1 15 15 T jf2 V OS + DIGITAL NANOVOLTMETER ISOTHERMAL CHAMBER HSSR-7110 2 3 4 1 6 7 5 8 - IF + - Figure 19. Voltage Offset Test Setup. |
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