NCP6132A, NCP6132B

http://onsemi.com

3

ROSC

VRMP

VRDY

SCLK

VRHOT#

SDIO

ALERT#

VCC

SW1

HG1

BST1

VDDBP

VSP

BSTA

PVCC

HGA

SWA

LGA

BST2

HG2

SW2

LG2

PGND

VSN

LG1

VBOOT

PWMA

DIFF

EN

Tab: GND

VRDYA

1

60

15

16

46

45

31

30

NCP6132A/NCP6132B

Figure 2. QFN60 Pin Diagram

Table 1. QFN60 PIN LIST DESCRIPTION

Pin

No.

Symbol

Description

1

VCC

Power for the internal control circuits. A decoupling capacitor is connected from this pin to ground.

2

VDDBP

Digital Logic power. Connect this pin to VCC with 10 W. Connect 0.1 mF capacitor from this pin to

ground

3

VRDYA

Open drain output. High indicates that the aux output is regulating.

4

EN

Logic input. Logic high enables both outputs and logic low disables both outputs.

5

SDIO

Serial VID data interface.

6

ALERT#

Serial VID ALERT#.

7

SCLK

Serial VID clock.

8

VBOOT

A resistor to GND on this pin sets the Core and Aux Boot−up Voltage

9

ROSC

A resistance from this pin to ground programs the oscillator frequency. This pin supplies a trimmed

output voltage of 2 V.

10

VRMP

Feed−forward input of Vin for the ramp slope compensation. The current fed into this pin is used to

control of the ramp of PWM slope

11

VRHOT#

Thermal logic output for over temperature.

12

VRDY

Open drain output. High indicates that the core output is regulating.

13

VSN

Inverting input to the core differential remote sense amplifier.

14

VSP

Non−inverting input to the core differential remote sense amplifier.

15

DIFF

Output of the core differential remote sense amplifier.

16

TRBST#

Compensation pin for the load transient boost.

17

FB

Error amplifier voltage feedback for core output

18

COMP

Output of the error amplifier and the inverting inputs of the PWM comparators for the core output.

19

IOUT

Total output current monitor for core output. Short it to GND if IMON function is not needed.

20

ILIM

Over current shutdown threshold setting for core output. Resistor to CSCOMP to set threshold.

21

DROOP

Used to program droop function for core output. It’s connected to the resistor divider placed between

CSCOMP and CSREF summing node.

22

CSCOMP

Output of total current sense amplifier for core output.