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30.0-36.0 GHz GaAs MMIC

Power Amplifier

P1017-BD

App Note [1] Biasing

Vd(1,2)=4.5V Id(1+2)=220mA, and Vd(3,4)=4.5V Id(3+4)=220mA, although best performance

will result in separately biasing Vd1 through Vd4, with Id1=Id3=110mA, Id2=Id4=110mA.

Separate biasing is recommended if the amplifier is to be used in a linear application or at high

levels of saturation, where gate rectification will alter the effective gate control voltage. For

non-critical applications it is possible to parallel all stages and adjust the common gate voltage

for a total drain current Id(total)=440mA.

[Linear Applications] -

For applications where the amplifier is being used in linear operation,

where best IM3 (Third-Order Intermod) performance is required at more than 5dB below P1dB,

it is also recommended to use active gate biasing to keep the drain currents constant as the RF

power and temperature vary; this gives the best performance and most reproducible results.

Depending on the supply voltage available and the power dissipation constraints, the bias

circuit may be a single transistor or a low power operational amplifier, with a low value resistor in series with the drain supply used to sense the

current.The gate voltage of the pHEMT is controlled to maintain correct drain current compensating for changes over temperature.

[Saturated Applications] -

For applications where the amplifier RF output power is saturated, the optimum drain current will vary with RF drive and

each amplifier stage is best operated at a constant gate voltage. Significant gate currents will flow at saturation and bias circuitry must allow for

drain current growth under this condition to achieve best RF output power and power added efficiency. Additionally, if the input RF power level will

vary significantly, a more negative gate voltage will result in less die heating at lower RF input drive levels where the absence of RF cooling becomes

significant. Note under this bias condition, gain will then vary with RF drive.

NOTE! -

For any application it is highly recommended to bias the output amplifier stage from both sides for best RF and thermal performance.

CAUTION!

- Also, make sure to properly sequence the applied voltages to ensure negative gate bias (Vg1,2,3) is available before applying the

positive drain supply (Vd1,2,3). Additionally, it is recommended that the device gates are protected with Silicon diodes to limit the applied voltage.

App Note [2] Bias Arrangement -

[For Individual Stage Bias]

(recommended for linear/saturated applications) - Each DC pad (Vd1,2,3 and Vg1,2,3) needs to have DC bypass

capacitance (100-200 pF) as close to the device as possible. Additional DC bypass capacitance (1 nF and 3.3 uF) is also recommended. All DC pads

have been tied together on chip and device can be biased from either side.

[For Parallel Stage Bias] (general applications) - The same as Individual Stage Bias but all the drain or gate pad DC bypass capacitors (100-200 pF)

are tied together at one point after bypass capacitance. Additional DC bypass capacitance (1 nF and 3.3 uF) is also recommended to all DC or

combination (if gate or drains are tied together) of DC bias pads. All DC pads have been tied together on chip and can be biased from either side.

NOTE!

In either arrangement, for most stable performance all unused DC pads must also be bypassed with at least 100-200 pf capacitance.

App Note [3] Material Stack-Up –

In addition to the practical aspects of bias and bias arrangement, device base

material stack-up also must be considered for best thermal performance. A well thought out thermal path solution

will improve overall device reliability, RF performance and power added efficiency.The photo shows a typical high

power amplifier carrier assembly.The material stack-up for this carrier is shown below.This stack-up is highly

recommended for most reliable performance however, other materials (i.e. eutectic solder vs epoxy, copper

tungsten/copper moly rib, etc.) can be considered/possibly used but only after careful review of material thermal

properties, material availability and end application performance requirements.

Copper Block

AuSn Eutectic Solder

Alumina Substrate

Diemat DM6030HK Epoxy, ~1mil

MOLY Carrier, 25mil

Au plated

MOLY Rib, 5mil, Au plated

MMIC, 4mil

Mimix Broadband, Inc., 10795 Rockley Rd., Houston,Texas 77099

Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com

Characteristic Data and Specifications are subject to change without notice. ©2010 Mimix Broadband, Inc.

Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept

their obligation to be compliant with U.S. Export Laws.

January 2010 - Rev 23-Jan-10