Et r onT ech

4Mx16 DDR SDRAM

EM658160

Etron Confidential

5

Rev. 1.1

Jan. 2002

Operation Mode

Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2

shows the truth table for the operation commands.

Table 2. Truth Table (Note (1), (2) )

Command

State

BankActivate

H

X

X

V

Row address

L

L

H

H

BankPrecharge

Any

H

X

X

V

L

X

L

L

H

L

PrechargeAll

Any

H

X

X

X

H

X

L

L

H

L

Write

HX

X

V

L

L

H

L

L

Write and AutoPrecharge

HX

X

V

H

Column

address

(A0 ~ A7)

LH

L

L

Read

HX

X

V

L

L

H

L

H

Read and Autoprecharge

HX

X

V

H

Column

address

(A0 ~ A7)

LH

L

H

Mode Register Set

Idle

H

X

X

OP code

L

L

L

L

Extended MRS

Idle

H

X

X

OP code

L

L

L

L

No-Operation

Any

H

X

X

X

X

X

L

H

H

H

Burst Stop

HX

X

X

X

X

L

H

H

L

Device Deselect

Any

H

X

X

X

X

X

H

XXX

AutoRefresh

Idle

H

H

X

X

X

X

L

L

L

H

SelfRefresh Entry

Idle

H

L

X

X

X

X

L

L

L

H

SelfRefresh Exit

Idle

L

H

XX

X

X

H

XXX

(SelfRefresh)

LH

H

H

Clock Suspend Mode Entry

Active

H

L

XX

X

X

X

XXX

Power Down Mode Entry

H

L

XX

X

X

H

XXX

LH

H

H

Clock Suspend Mode Exit

Active

L

H

XX

X

X

X

XXX

Power Down Mode Exit

Any

L

H

X

X

X

X

H

XXX

(PowerDown)

LH

H

H

Data Write/Output Enable

Active

H

X

L

X

XXX

X

X

X

Data Mask/Output Disable

Active

H

X

H

X

XXX

X

X

X

Note:

1. V=Valid data, X=Don't Care, L=Low level, H=High level

3. These are states of bank designated by BS signal.

4. Device state is 1, 2, 4, 8, and full page burst operation.

5. Power Down Mode can not enter in the burst operation.

When this command is asserted in the burst cycle, device state is clock suspend mode.