24C04A, 24C08A, 24C16A

© 2009 Fremont Micro Devices Inc.

DS3001M-page5

DEVICE ADDRESSING

The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to invoke valid read

or write command. The first four most significant bits of the device address must be 1010, which is common to all

to match with the external chip select/address pin states. If a match is made, the EEPROM device outputs an

programming mode.

2-wire bus. Their corresponding chip select address pins A2 and A1 must be hard wired and coded from 00 (b) to 11

(b). Chip select address pin A0 is not used.

bus. Their corresponding chip select address pin A2 must be hard-wired and coded from 0 (b) to 1 (b). Chip select

address pins A1 and A0 are not used.

FT24C16A does not use any device address bit. Only one FT24C16A device can be used on the on 2-wire bus. Chip

Select address pins A2, A1, and A0 are not used.

WRITE OPERATIONS

(A) BYTE WRITE

A byte write operation starts when a micro-controller sends a START bit condition, follows by a proper EEPROM

device address and then a write command. If the device address bits match the chip select address, the EEPROM

micro-controller will issue a STOP bit. After receiving the STOP bit, the EEPROM will go into a self-timed

programming will finish and the EEPROM device will return to the STANDBY mode.

(B) PAGE WRITE

A page write is similar to a byte write with the exception that one to sixteen bytes can be programmed along the

same page or memory row. All FT24C04A/08A/16A are organized to have 16 bytes per memory row or page.

With the same write command as the byte write, the micro-controller does not issue a STOP bit after sending the

EEPROM acknowledging cycle repeats until the micro-controller sends a STOP bit after the n

After which the EEPROM device will go into a self-timed partial or full page programming mode. After the page