PBL 386 11/2

9

SLIC Operating States

Figure 7. Pin configuration 28 pin SSOP and 28 pin PLCC package, top view.

State

C3

C2

C1

SLIC operating state

Active detector

0

0

0

0

Open circuit

Detector is set high

1

0

0

1

Ringing state

Ring trip detector (active low)

2

0

1

0

Active state

Loop detector (active low)

3

0

1

1

Not applicable

-

4

1

0

0

Not applicable

-

5

1

0

1

Active state

Ground key detector (active high)

6

1

1

0

Active reverse

Loop detector (active low)

7

1

1

1

Active reverse

Ground key detector (active high)

Table 1. SLIC operating states.

* Pins must be left open.

LP

DR

VEE

REF

PLC

HP

NC*

TS

RRLY

VTX

AGND

RSN

5

6

7

8

9

10

11

25

24

23

22

21

20

19

SPR

DT

1

2

3

4

5

6

7

8

9

10

11

26

25

24

23

22

21

20

19

18

17

16

TS

RRLY

HP

RINGX

BGND

TIPX

VBAT

PSG

VCC

RSN

DET

VEE

C1

C2

PLD

PLC

REF

LP

AOV

C3

VBAT2

SPR

12

15

DT

13

DR

14

NC

28

VTX

27

AGND

NC