PBL 386 10/2

8

Pin Description

Refer to figure 7.

PLCC

Symbol

Description

1

VBAT

Battery supply voltage. Negative with respect to BGND.

2

VBAT2

An optional second battery voltage, connected in series with a diode, or an external powerhandling

resistor connects to this pin.

3

AOV

Adaptive Overhead Voltage. If the pin is left open then the overhead voltage is set internally to 2.5 V

Peak

in off-hook and 1.4 V

connected to AGND then no internal overhead voltage is set. The overhead voltage adapts to

0.6 V

4

PSG

Programmable Saturation Guard. The resistive part of the DC feed characteristic is programmed by a

resistor connected from this pin to VBAT.

5

LP

Low Pass saturation guard filter capacitor connected here to filter out noise and improve PSRR. Other

end of C

6

DT

Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level

low, indicating off-hook condition. The ring trip network connects to this input.

7

DR

Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic

level low, indicating off-hook condition. The ring trip network connects to this input.

8

VEE

-5V to VBAT power supply.

9

REF

A 15kohm resistor should be connected between this pin and AGND.

10

NU

Not Used. Must be left open.

11

PLC

Prog. Line Current, the constant current part of the DC feed characteristic is programmed by a resistor

connected from this pin to AGND.

12

PLD

Programmable Loop Detector threshold. The loop detection threshold is programmed by a resistor

connected from this pin to AGND.

13

VCC

+5 V power supply.

14

C3

C1, C2 and C3 are digital inputs Controlling the SLIC operating states. Refer to section

15

C2

Operating states for details.

16

C1

17

NC

No Connect. Must be left open.

18

DET

Detector output. Active low when indicating loop or ring trip detection, active high when indicating ground

key detection

19

RSN

Receive Summing Node. 400 times the current flowing into this pin equals the metallic (transversal)

current flowing from TIPX to RINGX. Programming networks for two-wire impedance and receive gain

connect to the receive summing node.

20

AGND

Analog Ground, should be tied together with BGND.

21

VTX

Transmit vf output. The ac voltage difference between TIPX and RINGX, the ac metallic voltage, is

reproduced as an unbalanced GND referenced signal at VTX with a gain of -0.5. The two-wire

impedance programming network connects between VTX and RSN.

22

RRLY

Ring Relay driver output.

23

TS

Tip Sense should be connected to TIPX.

24

NC

No Connect. Must be left open.

25

HP

High Pass connection for ac/dc separation capacitor C

26

RINGX

The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage

protection components and ring relay (and optional test relay).

27

BGND

Battery Ground, should be tied together with AGND.

28

TIPX

The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage

protection components and ring relay (and optional test relay).

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