10

®

DAC7612

next 12 bits are the code (MSB-first) sent to the DAC. The

data format is Straight Binary and is loaded MSB-first into

the shift registers after loading the address bits. Table I shows

the relationship between input code and output voltage.

The digital data into the DAC7612 is double-buffered. This

means that new data can be entered into the chosen DAC

without disturbing the old data and the analog output of the

converter. At some point after the data has been entered into

the serial shift register, this data can be transferred into the

DAC registers. This transfer is accomplished with a HIGH

to LOW transition of the LOADDACS pin. The LOADDACS

pin makes the DAC registers transparent. If new data is

shifted into the shift register while LOADDACS is LOW,

the DAC output voltages will change as each new bit is

entered. To prevent this, LOADDACS must be returned

HIGH prior to shifting in new serial data.

DIGITAL-TO-ANALOG CONVERTER

The internal DAC section is a 12-bit voltage output

device that swings between ground and the internal ref-

erence voltage. The DAC is realized by a laser-trimmed

R-2R ladder network which is switched by N-channel

MOSFETs. Each DAC output is internally connected to a

rail-to-rail output operational amplifier.

OUTPUT AMPLIFIER

A precision, low-power amplifier buffers the output of each

DAC section and provides additional gain to achieve a 0V to

4.095V range. Each amplifier has low offset voltage, low

OPERATION

The DAC7612 is a dual, 12-bit digital-to-analog converter

(DAC) complete with a serial-to-parallel shift register, DAC

registers, laser-trimmed 12-bit DACs, on-board reference,

and rail-to-rail output amplifiers. Figure 1 shows the basic

operation of the DAC7612.

INTERFACE

Figure 1 shows the basic connection between a

microcontroller and the DAC7612. The interface consists of

a Serial Clock (CLK), Serial Data (SDI), and a Load DAC

signal (LOADDACS). In addition, a chip select (CS) input is

available to enable serial communication when there are

multiple serial devices. Loading either DAC A or DAC B is

done by shifting 14 serial bits in via the SDI input. The first

2 bits represent the address of the DAC to be updated and the

DAC7612 Full-Scale Range = 4.095V

Least Significant Bit = 1mV

DIGITAL INPUT CODE

ANALOG OUTPUT

STRAIGHT OFFSETBINARY

(V)

DESCRIPTION

+4.095

Full Scale

+2.049

Midscale + 1 LSB

+2.048

Midscale

+2.047

Midscale – 1 LSB

0

Zero Scale

TABLE I. Digital Input Code and Corresponding Ideal

Analog Output.

FIGURE 1. Basic Operation of the DAC7612.

1

2

3

4

8

7

6

5

SDI

CLK

LOADDACS

CS

V

OUTA

V

DD

GND

V

OUTB

DAC7612U

Serial Data

Serial Clock

Load DACs

Chip Select

0.1

µF

0V to +4.095V

0V to +4.095V

10

µF

+