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TDA7110F Datasheet(PDF) 11 Page - Infineon Technologies AG |
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TDA7110F Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 36 page Data Sheet 11 V 1.0, 2009-02-26 TDA7110F Functional Description 1) Indicated voltages and currents apply for PLL Enable Mode and Transmit Mode. In Power Down Mode, the values are zero or high-ohmic. 8 PAGND Ground connection of the power amplifier. The RF ground return path of the power amplifier output PAOUT (pin 9) has to be concentrated to this pin. 9 PAOUT RF output pin of the transmitter. A DC path to the positive supply VS has to be supplied by the antenna matching network. 10 PDWN Disable pin for the complete transmitter circuit. A logic low (PDWN < 0.7 V) turns off all transmitter functions. A logic high (PDWN > 1.5 V) gives access to all transmitter functions. PDWN input will be pulled up by 40 µA internally by either setting FSKDTA or ASKDTA to a logic high-state. Pin No. Symbol Interface Schematic Function 9 8 10 V S 150 k Ω 5 k Ω 250 k Ω "ON" 40 μA ∗ (ASKDTA+FSKDTA) |
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