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ADR530 Datasheet(PDF) 11 Page - Analog Devices |
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ADR530 Datasheet(HTML) 11 Page - Analog Devices |
11 / 12 page ADR525/ADR530/ADR550 Rev. F | Page 11 of 12 OUTLINE DIMENSIONS ALL DIMENSIONS COMPLIANT WITH EIAJ SC70 0.40 0.25 0.10 MAX 1.00 0.80 1.10 0.80 0.40 0.10 0.26 0.10 0.30 0.20 0.10 2 1 3 0.65 BSC 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 COPLANARITY 0.10 SEATING PLANE Figure 21. 3-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-3) Dimensions shown in millimeters 3.04 2.90 2.80 COMPLIANT TO JEDEC STANDARDS TO-236-AB 1 2 3 SEATING PLANE 2.64 2.10 1.40 1.30 1.20 2.05 1.78 0.100 0.013 1.03 0.89 0.60 0.45 0.51 0.37 1.12 0.89 0.180 0.085 0.25 0.54 REF GAUGE PLANE 0.60 MAX 0.30 MIN 1.02 0.95 0.88 Figure 22. 3-Lead Small Outline Transistor Package [SOT-23-3] (RT-3) Dimensions shown in millimeters |
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