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IDT1339-31DVGI Datasheet(PDF) 6 Page - Integrated Device Technology |
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IDT1339-31DVGI Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 26 page IDT1339 REAL-TIME CLOCK WITH SERIAL I2C INTERFACE RTC IDT® REAL-TIME CLOCK WITH SERIAL I2C INTERFACE 6 IDT1339 REV S 031014 Address Map Table 3 (Timekeeper Registers) shows the address map for the IDT1339 registers. During a multibyte access, when the address pointer reaches the end of the register space (10h), it wraps around to location 00h. On an I2C START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run. This eliminates the need to re-read the registers in case of an update of the main registers during a read. Table 3. Timekeeper Registers Note: Unless otherwise specified, the state of the registers are not defined when power is first applied or when VCC and VBACKUP falls below the VBACKUP(min). Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Function Range 00h 0 10 seconds Seconds Seconds 00 - 59 01h 0 10 minutes Minutes Minutes 00 - 59 02h 0 12/24 AM/PM 10 hour Hour Hours 1 - 12 + AM/PM 00 - 23 10 hour 03h 0 0000 Day Day 1 - 7 04h 0 0 10 date Date Date 01 - 31 05h Century 0 0 10 month Month Month/Century 01 - 12 + Century 06h 10 year Year Year 00 - 99 07h A1M1 10 seconds Seconds Alarm 1 Seconds 00 - 59 08h A1M2 10 minutes Minutes Alarm 1 Minutes 00 - 59 09h A1M3 12/24 AM/PM 10 hour Hour Alarm 1 Hours 1 - 12 + AM/PM 00 - 23 10 hour 0Ah A1M4 DY/DT 10 date Day, Date Alarm 1 Day, Alarm 1 Date 1 - 7, 1 - 31 0Bh A2M2 10 minutes Minutes Alarm 2 Minutes 00 - 59 0Ch A2M3 12/24 AM/PM 10 hour Hour Alarm 2 Hours 1 - 12 + AM/PM 00 - 23 10 hour 0Dh A2M4 DY/DT 10 date Day, Date Alarm 2 Day, Alarm 2 Date 1 - 7, 1 - 31 0Eh EOSC 0 BBSQI RS2 RS1 INTCN A2IE A1IE Control 0Fh OSF 00000 A2F A1F Status 10h TCS3 TCS2 TCS1 TCS0 DS1 DS0 ROUT1 ROUT0 Trickle Charger |
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